MCM6264CP15 데이터 시트보기 (PDF) - Motorola => Freescale
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MCM6264CP15 Datasheet PDF : 8 Pages
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WRITE CYCLE 1 (W Controlled, See Notes 1, 2, and 3)
– 12
– 15
– 20
– 25
– 35
Parameter
Symbol Min Max Min Max Min Max Min Max Min Max Unit Notes
Write Cycle Time
tAVAV 12 — 15 — 20 — 25 — 35 — ns
4
Address Setup Time
Address Valid to End of Write
tAVWL
0
—
0
—
0
—
0
—
0
— ns
tAVWH 10 — 12 — 15 — 17 — 20 — ns
Write Pulse Width
tWLWH, 10 — 12 — 15 — 17 — 20 — ns
tWLEH
Write Pulse Width, G High
tWLWH, 8
— 10 — 12 — 15 — 17 —
ns
5
tWLEH
Data Valid to End of Write
tDVWH 6
—
7
—
8
— 10 — 12 —
ns
Data Hold Time
Write Low to Output High–Z
Write High to Output Active
tWHDX 0
—
0
—
0
—
0
—
0
— ns
tWLQZ 0
6
0
7
0
8
0 10 0 12 ns 6, 7, 8
tWHQX 4
—
4
—
4
—
4
—
4
— ns 6, 7, 8
Write Recovery Time
tWHAX 0
—
0
—
0
—
0
—
0
— ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. E1 and E2 are represented by E in this data sheet. E2 is of opposite polarity to E.
3. If G goes low coincident with or after W goes low, the output will remain in a high impedance state.
4. All timings are referenced from the last valid address to the first transitioning address.
5. If G ≥ VIH, the output will remain in a high impedance state.
6. At any given voltage and temperature, tWLQZ (max) is less than tWHQX (min), both for a given device and from device to device.
7. Transition is measured ± 500 mV from steady–state voltage with load of Figure 1B.
8. This parameter is sampled and not 100% tested.
A (ADDRESS)
E (CHIP ENABLE)
W (WRITE ENABLE)
D (DATA IN)
Q (DATA OUT)
WRITE CYCLE 1 (W Controlled, See Notes 1, 2, and 3)
tAVAV
tAVWH
tWLWH
tWLEH
tAVWL
HIGH–Z
tWLQZ
tDVWH
DATA VALID
HIGH–Z
tWHAX
tWHDX
tWHQX
MOTOROLA FAST SRAM
MCM6264C
5
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