RT8061A 데이터 시트보기 (PDF) - Richtek Technology
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RT8061A Datasheet PDF : 12 Pages
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RT8061A
Under Voltage Protection (UVP)
The output voltage can be continuously monitored for under
voltage. When under voltage protection is enabled, both
UGATE and LGATE gate drivers will be forced low if the
output is less than 66% of its set voltage threshold. The
UVP will be ignored for at least 3ms (typ.) after start up or
a rising edge on the EN threshold. Toggle EN threshold or
cycle VIN to reset the UVP fault latch and restart the
controller.
Over Voltage Protection (OVP)
The RT8061A is latched once OVP is triggered and can
only be released by toggling EN threshold or cycling VIN.
There is a 10μs delay built into the over voltage protection
circuit to prevent false transition.
Over Current Protection (OCP)
The RT8061A provides over current protection by detecting
high side MOSFET peak inductor current. If the sensed
peak inductor current remains over 4A (typ) for 5 clock
cycles, OCP will be triggered. When OCP trips, the
RT8061A will shut down and enter Latch-Off Mode to stop
the energy transfer to the load. In Latch-Off Mode, the
RT8061A can only be reset by EN or VIN.
Thermal Shutdown (OTP)
The device implements internal thermal shutdown when
the junction temperature exceeds 150°C. When the OTP
function is triggered, the RT8061A shuts down and enters
Latch-Off Mode. In Latch-Off Mode, the RT8061A can be
reset by EN or VIN.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
WDFN-10L 3x3 packages, the thermal resistance, θJA, is
70°C/W on a standard JEDEC 51-7 four-layer thermal test
board. The maximum power dissipation at TA = 25°C can
be calculated by the following formula :
PD(MAX) = (125°C − 25°C) / (70°C/W) = 1.429W for
WDFN-10L 3x3 package
The maximum power dissipation depends on the operating
ambient temperature for fixed TJ(MAX) and thermal
resistance, θJA. The derating curve in Figure 2 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
1.6
Four-Layer PCB
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 2. Derating Curve of Maximum Power Dissipation
Copyright ©2012 Richtek Technology Corporation. All rights reserved.
www.richtek.com
10
is a registered trademark of Richtek Technology Corporation.
DS8061A-04 September 2012
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