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RT8078A 데이터 시트보기 (PDF) - Richtek Technology

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RT8078A Datasheet PDF : 12 Pages
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RT8078A
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant
frequency architectures by preventing sub-harmonic
oscillations at duty cycles greater than 50%. It is
accomplished internally by adding a compensating ramp
to the inductor current signal. Normally, the maximum
inductor peak current is reduced when slope compensation
is added. In this IC, however, separated inductor current
signal is used to monitor over current condition and this
keeps the maximum output current relatively constant
regardless of duty cycle.
Over Voltage Protection
The IC provides over voltage protection once the output
voltage exceeds 120% of VOUT, The OVP function latches
off the switching operation and can only be released by
toggling EN threshold or cycling VIN. There is a 10μs delay
built into the over voltage protection circuit to prevent false
transition.
Under Voltage Lockout Threshold
The IC includes an input Under Voltage Lockout Protection
(UVLO). If the input voltage exceeds the UVLO rising
threshold voltage, the converter resets and prepares the
PWM for operation. If the input voltage falls below the
UVLO falling threshold voltage during normal operation,
the device stops switching. The UVLO rising and falling
threshold voltage includes a hysteresis to prevent noise-
caused reset.
Thermal Shutdown
The device implements an internal thermal shutdown
function when the junction temperature exceeds 150°C.
The thermal shutdown disables the device until the junction
temperature drops below the hysteresis (20°C typ.). Then,
the device is re-enabled and automatically reinstates the
power up sequence.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications of
the RT8078A, the maximum junction temperature is 125°C
and TA is the ambient temperature. The junction to ambient
thermal resistance, θJA, is layout dependent. For SOP-8
(Exposed Pad) packages, the thermal resistance, θJA, is
75°C/W on a standard JEDEC 51-7 four-layer thermal test
board. For WDFN-10L 3x3 packages, the thermal
resistance, θJA, is 70° C/W on a standard JEDEC 51-7
four-layer thermal test board. The maximum power
dissipation at TA = 25°C can be calculated by the following
formulas :
PD(MAX) = (125°C 25°C) / (75°C/W) = 1.333W for
SOP-8 (Exposed Pad) package
PD(MAX) = (125°C 25°C) / (70°C/W) = 1.429W for
WDFN-10L 3x3 package
The maximum power dissipation depends on the operating
ambient temperature for fixed TJ(MAX) and thermal
resistance, θJA. For the RT8078A package, the derating
curves in Figure 2 allow the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
DS8078A-01 June 2011
www.richtek.com
9

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