LH28F800SU 데이터 시트보기 (PDF) - Sharp Electronics
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LH28F800SU Datasheet PDF : 38 Pages
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LH28F800SU
FEATURES
• User-Configurable x8 or x16 Operation
• User-Selectable 3.3 V or 5 V VCC
• 5 V Write/Erase Operations (5 V VPP)
– No Requirement for DC/DC
Converter to Write/Erase
• 70 ns Maximum Access Time
• Minimum 2.7 V Read capability
– 160 ns Maximum Access Time
(VCC = 2.7 V)
• 16 Independently Lockable Blocks
• 0.32 MB/sec Write Transfer Rate
• 100,000 Erase Cycles per Block
• Revolutionary Architecture
– Pipelined Command Execution
– Write During Erase
– Command Superset of
Sharp LH28F008SA
• 5 µA (TYP.) ICC in CMOS Standby
• 1 µA (TYP.) Deep Power-Down
• State-of-the-Art 0.55 µm ETOX™
Flash Technology
• 56-Pin, 1.2 mm × 14 mm × 20 mm
TSOP (Type I) Package
8M (512K × 16, 1M × 8) Flash Memory
56-PIN TSOP
TOP VIEW
WP 56
WE 55
OE 54
RY/BY 53
DQ15 52
DQ7 51
DQ14 50
DQ6 49
GND 48
DQ13 47
DQ5 46
DQ12 45
DQ4 44
VCC
43
GND 42
DQ11 41
DQ3 40
DQ10 39
DQ2 38
VCC
37
DQ9 36
DQ1 35
DQ8 34
DQ0 33
A0 32
BYTE 31
NC 30
NC 29
1 3/5
2 CE1
3 NC
4 NC
5
A19
6
A18
7
A17
8
A16
9
VCC
10 A15
11 A14
12 A13
13 A12
14 CE0
15 VPP
16 RP
17 A11
18
A10
19 A9
20 A8
21 GND
22 A7
23 A6
24 A5
25 A4
26 A3
27 A2
28 A1
28F800SUR-1
Figure 1. TSOP Reverse Bend Configuration
1
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