LH28F800BGN-BL12 데이터 시트보기 (PDF) - Sharp Electronics

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LH28F800BGN-BL12

8 M-bit (512 kB x 16) SmartVoltage Flash Memory

Sharp Electronics 

1 INTRODUCTION

This datasheet contains LH28F800BG-L speci-

fications. Section 1 provides a flash memory

overview. Sections 2, 3, 4 and 5 describe the

memory organization and functionality. Section 6

covers electrical specifications. LH28F800BG-L

flash memory documentation also includes ordering

information which is referenced in Section 7.

1.1 New Features

Key enhancements of LH28F800BG-L SmartVoltage

flash memory are :

• SmartVoltage Technology

• Enhanced Suspend Capabilities

• Boot Block Architecture

Note following important differences :

• VPPLK has been lowered to 1.5 V to support

2.7 V, 3.3 V and 5 V block erase and word

write operations. Designs that switch VPP off

during read operations should make sure that

the VPP voltage transitions to GND.

• To take advantage of SmartVoltage technology,

allow VPP connection to 2.7 V, 3.3 V or 5 V.

1.2 Product Overview

The LH28F800BG-L is a high-performance 8 M-bit

SmartVoltage flash memory organized as 512 k-

word of 16 bits. The 512 k-word of data is arranged

in two 4 k-word boot blocks, six 4 k-word parameter

blocks and fifteen 32 k-word main blocks which are

individually erasable in-system. The memory map is

shown in Fig. 1.

SmartVoltage technology provides a choice of VCC

and VPP combinations, as shown in Table 1, to

meet system performance and power expectations.

2.7 V VCC consumes approximately one-fifth the

power of 5 V VCC and 3.3 V VCC consumes

approximately one-fourth the power of 5 V VCC.

But, 5 V VCC provides the highest read

LH28F800BG-L (FOR SOP)

performance. VPP at 2.7 V, 3.3 V and 5 V

eliminates the need for a separate 12 V converter,

while VPP = 12 V maximizes block erase and word

write performance. In addition to flexible erase and

program voltages, the dedicated VPP pin gives

complete data protection when VPP ≤ VPPLK.

Table 1 VCC and VPP Voltage Combinations

Offered by SmartVoltage Technology

VCC VOLTAGE

2.7 V

3.3 V

5V

VPP VOLTAGE

2.7 V, 3.3 V, 5 V, 12 V

3.3 V, 5 V, 12 V

5 V, 12 V

Internal VCC and VPP detection circuitry auto-

matically configures the device for optimized read

and write operations.

A Command User Interface (CUI) serves as the

interface between the system processor and

internal operation of the device. A valid command

sequence written to the CUI initiates device

automation. An internal Write State Machine (WSM)

automatically executes the algorithms and timings

necessary for block erase and word write

operations.

A block erase operation erases one of the device’s

32 k-word blocks typically within 0.39 second (5 V

VCC, 12 V VPP), 4 k-word blocks typically within

0.25 second (5 V VCC, 12 V VPP) independent of

other blocks. Each block can be independently

erased 100 000 times. Block erase suspend mode

allows system software to suspend block erase to

read data from, or write data to any other block.

Writing memory data is performed in word increments

of the device’s 32 k-word blocks typically within 8.4 µs

(5 V VCC, 12 V VPP), 4 k-word blocks typically within

17 µs (5 V VCC, 12 V VPP). Word write suspend

mode enables the system to read data from, or write

data to any other flash memory array location.

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