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RT9526GE 데이터 시트보기 (PDF) - Richtek Technology

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RT9526GE Datasheet PDF : 14 Pages
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RT9526
Power Good
This open-drain output pin is used to indicate the input
voltage status. The PGB output asserts low when
1. VIN > VPOR
2. VIN VBATT > VOS
3. VIN < VOVP
It can be used to drive an LED or communicate to the
host processor. Note that ON indicates the open-drain
transistor is turned on and LED is bright.
CHG_SB Indication
The CHG_SB pin is an open-drain output capable to at
least 10mA current when the charger starts to charge and
turns off when the EOC current is reached. The CHG_SB
signal is interfaced either with a micro processor GPIO or
an LED for indication.
End-Of-Charge Current (EOC)
Connect a resistor between the IMIN pin and GND to set
the EOC current. The EOC current level, IIMIN, is
programmable via the external resistor, RIMIN, as shown
in the following equation :
IIMIN
=
4148
RIMIN
(mA)
Upon reaching the End-Of-Charge (EOC) current, the
charger indicates charge completion via the CHG_SB pin,
but the charger continues to output 4.2V voltage. Figure
1 shows the typical charge profile and the EOC/reset
event. The CHG_SB signal asserts low when the trickle
charge starts and changes to high at EOC. After EOC is
reached, the charge current has to rise above 75% of
ICHG_FAST before the CHG_SB signal is allowed to turn on
again. A current surge after EOC may occur due to a load
connected to the battery.
Temperature Regulation and Thermal Protection
In order to maximize charge rate, the RT9526 features a
junction temperature regulation loop. If the power
dissipation of the IC results in junction temperature greater
than the thermal regulation threshold (115°C), the RT9526
will cut back on the charge current and disconnect the
battery in order to maintain thermal regulation at around
115°C. This operation continues until the junction
temperature falls below thermal regulation threshold
(115°C) by the hysteresis level. This feature prevents the
maximum power dissipation from exceeding typical design
conditions.
Selecting the Input and Output Capacitors
In most applications, a 1μF high frequency decoupling
capacitor placed in close proximity to the input is sufficient.
However, depending on the power supply characteristics
and cable length, it may be necessary to add an additional
10μF ceramic capacitor to the input. For the RT9526, a
small output capacitor is required for loop stability. A 1μF
ceramic capacitor placed between the BATT pin and GND
is typically sufficient.
Thermal Considerations
For recommended operating condition specifications of
the RT9526, the maximum junction temperature is 125°C
and TA is the ambient temperature. The junction to ambient
thermal resistance, θJA, is layout dependent. For
SOT-23-6 packages, the thermal resistance, θJA, is
250°C/W on a standard JEDEC 51-3 single-layer thermal
test board. For WDFN-8L 2x2 packages, the thermal
resistance, θJA, is 165°C/W on a standard JEDEC 51-3
single-layer thermal test board. For WDFN-8L 2x3
packages, the thermal resistance, θJA, is 120°C/W on a
standard JEDEC 51-3 single-layer thermal test board. The
maximum power dissipation at TA = 25°C can be calculated
by the following formula :
PD(MAX) = (125°C 25°C) / (250°C/W) = 0.400W for
SOT-23-6 package
PD(MAX) = (125°C 25°C) / (165°C/W) = 0.606W for
WDFN-8L 2x2 package
PD(MAX) = (125°C 25°C) / (120°C/W) = 0.833W for
WDFN-8L 2x3 package
The maximum power dissipation depends on the operating
ambient temperature for fixed TJ (MAX) and thermal
resistance, θJA. For the RT9526 packages, the derating
curves in Figure 2 allow the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
www.richtek.com
10
DS9526-01 April 2011

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