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RTL8100CL-LF 데이터 시트보기 (PDF) - Realtek Semiconductor

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RTL8100CL-LF Datasheet PDF : 72 Pages
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RTL8100C & RTL8100CL
Datasheet
5.6. Attachment Unit Interface
Symbol
TXD+
TXD-
RXIN+
RXIN-
X1
X2
Type
O
O
I
I
I
O
Table 6. Attachment Unit Interface
Pin No
Description
1
100/10Base-T Transmit (TX) data.
2
5
100/10Base-T Receive (RX) data.
6
121
25MHz Crystal/OSC Input.
122
Crystal Feedback Output.
This output is used in a crystal connection only. It must be left open when
X1 is driven with an external 25MHz oscillator.
5.7. Test and Other Pins
Symbol
RTT3
RTSET
CTRL25
CLKRUN
NC
Table 7. Test and Other Pins
Type
Pin No
Description
TEST
123
Chip Test pin.
I/O
127
This pin must be pulled low by a resistor.
Refer to section 9 Application Information, page 61, for the correct
value.
Analog
8
Use this pin and an external PNP type transistor to generate +2.5V for
the RTL8100C(L).
I/O
65
Clock Run.
This signal is used to request starting (or speeding up) of the clock.
CLKRUN also indicates the clock status. CLKRUN is an open drain
output as well as an input. The RTL8100C(L) requests the central
resource to start, speed up, or maintain the interface clock by the
assertion of CLKRUN. For the host system, it is an S/T/S signal. The
host system (central resource) is responsible for maintaining
CLKRUN asserted, and for driving it high to the negated (deasserted)
state.
- 9~11,13~16, 18, 19, 22, Not Connected.
24, 45, 48, 62, 72~74,
110, 112, 116, 118,
120, 125, 126
Single-Chip Fast Ethernet Controller
9
Track ID: JATR-1076-21 Rev. 1.06

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