S-1112A20MC-L6FTFX 데이터 시트보기 (PDF) - Unspecified

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S-1112A20MC-L6FTFX

HIGH RIPPLE-REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR

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HIGH RIPPLE-REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR

Rev.6.1_02

S-1112/1122 Series

 Standard Circuit

Input

CIN*1

VIN VOUT

ON/OFF

VSS

Output

CL*2

Single GND

GND

*1. CIN is a capacitor for stabilizing the input.

*2. A ceramic capacitor of 0.47 F or more can be used for CL.

Figure 10

Caution The above connection diagram and constant will not guarantee successful operation.

Perform thorough evaluation using the actual application to set the constant.

 Condition of Application

Input capacitor (CIN):

Output capacitor (CL):

ESR of output capacitor:

1.0 F or more

0.47 F or more

10  or less

Caution Generally a series regulator may cause oscillation, depending on the selection of external

parts. Check that no oscillation occurs with the application using the above capacitor.

11

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