S3C1840 데이터 시트보기 (PDF) - Samsung
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S3C1840 Datasheet PDF : 91 Pages
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S3C1840
PIN CONFIGURATION (20 DIP, 20 SOP)
VSS
XI
XO
P0.0
P0.1
P0.2
P0.3
P1.0
P1.1
P3.3
1
20
2
19
3
18
4
17
5 S3C1840 16
6
15
7
14
8
13
9
12
10
11
VDD
P2.0/REM
TEST
P2.1
P2.2
P2.3
P2.4
P3.0
P3.1
P3.2
Figure 1-3. Pin Configuration (20 DIP, 20 SOP)
Table 1-2. Pin Description for 20 Pins
Pin
Name
P0.0-P0.3
P1.0-P1.1
P2.0/REM
P2.2-P2.4
P2.1
P3.0-P3.3
TEST
XI
XO
VDD
VSS
Pin
Number
4, 5, 6, 7
8, 9
19
16, 15, 14
17
13, 12, 11, 10
18
2
3
20
1
Pin
Type
Input
Input
Output
Output
Description
4-bit input port when P2.13 is low
2-bit input port when P2.13 is high
1-bit individual output for remote carrier
frequency (1)
1-bit individual output port
Output
Input
Input
Output
–
–
4-bit parallel output port
Input pin for test (Normally connected to VSS)
Oscillation clock input
Oscillation clock output
Power supply
Ground
I/O Circuit
Type
A
A
B
C
D
C
–
–
–
–
–
NOTES:
1. The carrier can be selected by software as fxx/12 (1/3 duty), fxx/12 (1/4 duty), fxx/8 (1/2 duty), or no-carrier
frequency.
2 Package type can be selected as 20 DIP, or 20 SOP in the ordering sheet.
1-4
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