S3C24A0A 데이터 시트보기 (PDF) - Samsung

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S3C24A0A

32-BIT RISC MICROPROCESSOR

Samsung 

Table of Contents (Continued)

Chapter 11 UART

Overview........................................................................................................................................................11-1

Features................................................................................................................................................11-1

Block Diagram ......................................................................................................................................11-2

Uart Operation ......................................................................................................................................11-3

Uart Special Registers...................................................................................................................................11-10

Uart Line Control Register ....................................................................................................................11-10

Uart Control Register............................................................................................................................11-11

Uart FIFO Control Register...................................................................................................................11-13

Uart Modem Control Register...............................................................................................................11-14

Uart Tx/Rx Status Register...................................................................................................................11-15

Uart Error Status Register ....................................................................................................................11-16

Uart FIFO Status Register ....................................................................................................................11-17

Uart Modem Status Register ................................................................................................................11-18

Uart Transmit Buffer Register(Holding Register & FIFO Register) ......................................................11-19

Uart Receive Buffer Register (Holding Register & FIFO Register) ......................................................11-19

Uart Baud Rate Divisor Register ..........................................................................................................11-20

Uart Baud Rate Divisor Register ..........................................................................................................11-20

Chapter 12 IrDA Controller

Overview........................................................................................................................................................12-1

Feature .................................................................................................................................................12-1

Block Diagram ......................................................................................................................................12-2

External Interface Signals.....................................................................................................................12-2

Function Description.............................................................................................................................12-3

Core Initialization Procedure ................................................................................................................12-9

Special Function Registers ...........................................................................................................................12-10

IrDA Control Register (IrDA_CNT) .......................................................................................................12-10

IrDA Mode Definition Register(IrDA_MDR) ..........................................................................................12-11

IrDA Interrupt / DMA Configuration Register (IrDA_CNF)....................................................................12-11

IrDA Interupt Enalble Register (IrDA_IER) ...........................................................................................12-12

IrDA Interupt Identification Register (IrDA_IIR) ....................................................................................12-13

IrDA Line Status Register (IrDA_LSR) .................................................................................................12-14

IrDA FIFO Control Register (IrDA_FCR) ..............................................................................................12-15

IrDA Preamble Length Register (IrDA_PLR)........................................................................................12-16

IrDA Total Number of Data Bytes Remained in Rx FIFO (IrDA_RXNO)..............................................12-17

IrDA Transmit Frame-Length Register Low (IrDA_TXFLL) ..................................................................12-17

IrDA Transmit Frame-Length Register High (IrDA_TXFLH).................................................................12-17

IrDA Receiver Frame-Length Register Low (IrDA_RXFLL) .................................................................12-18

IrDA Receiver Frame-Length Register High (IrDA_RXFLH) ................................................................12-18

S3C24A0A MICROPROCESSOR

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