ELECTRICAL DATA
S3C7335/P7335
Table 17-3. Main System Clock Oscillator Characteristics
(TA = – 40 °C + 85 °C, VDD = 1.8 V to 5.5 V)
Oscillator
Clock
Configuration
Parameter
Test Condition
Min Typ Max Units
Ceramic
Oscillator
XIN XOUT
Oscillation frequency VDD = 2.7 V to 5.5 V 0.4
–
(1)
6 MHz
C1 C2
Crystal
Oscillator
Stabilization time (2) Stabilization occurs
–
–
when VDD is equal to
the minimum oscillator
voltage range.
XIN XOUT
Oscillation frequency VDD = 2.7 V to 5.5 V 0.4
–
(1)
C1 C2
4
ms
6 MHz
External
Clock
Stabilization time (2) VDD = 4.5 V to 5.5 V –
–
10 ms
VDD = 1.8 V to 4.5 V –
–
30
XIN XOUT XIN input frequency (1)
–
0.4
–
6 MHz
XIN input high and low
–
level width (tXH, tXL)
83.3 –
–
ns
NOTES:
1. Oscillation frequency and XIN input frequency data are for oscillator characteristics only.
2. Stabilization time is the interval required for oscillator stabilization after a power-on occurs, or when stop mode is
terminated.
17-6