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S3C7335 데이터 시트보기 (PDF) - Samsung

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S3C7335 Datasheet PDF : 41 Pages
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S3C7335/P7335
FEATURES (Continued)
Interrupts
Four internal vectored interrupts
Four external vectored interrupts
Two quasi-interrupts
Memory-Mapped I/O Structure
Data memory bank 15
Three Power-Down Modes
Idle: Only CPU clock stops
Stop1: Main system or subsystem clock stops
Stop2: Main system and subsystem clock stop
CE low: PLL and IFC stop
Oscillation Sources
Crystal or ceramic oscillator for main system
clock
Crystal for subsystem clock
Main system clock frequency: 4.5 MHz (Typ)
Subsystem clock frequency: 32.768 kHz (Typ)
CPU clock divider circuit (by 4, 8, or 64)
PRODUCT OVERVIEW
Instruction Execution Times
0.9, 1.8, 14.2 µs at 4.5 MHz
122 µs at 32.768 kHz (subsystem)
Operating Temperature
– 40 °C to 85 °C
Operating Voltage Range
1.8 V to 5.5 V at 3MHz
PLL/IFC operation: 2.5V to 3.5V or 4.0V to 5.5V
Package Type
80-pin QFP
1-3

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