SAA6750H 데이터 시트보기 (PDF) - Philips Electronics

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SAA6750H

Encoder for MPEG2 image recording (EMPIRE)

Philips Electronics 

Philips Semiconductors

Encoder for MPEG2 image recording

(EMPIRE)

Product specification

SAA6750H

SYMBOL

DATA53

DATA54

DATA55

VSS

DATA56

DATA57

DATA58

DATA59

VDD

DATA60

DATA61

DATA62

DATA63

VSS

ADR0

ADR1

ADR2

ADR3

VDD

ADR4

ADR5

ADR6

ADR7

VSS

ADR8

CASN

VDD

RASN

WEN

OEN

VSS

YUV0

YUV1

YUV2

YUV3

VSSCO

VDDCO

VSSCO

VDDCO

VSSCO

PIN INPUT/OUTPUT(1)

40 input/output

41 input/output

42 input/output

43 ground

44 input/output

45 input/output

46 input/output

47 input/output

48 supply

49 input/output

50 input/output

51 input/output

52 input/output

53 ground

54 output/3-state

55 output/3-state

56 output/3-state

57 output/3-state

58 supply

59 output/3-state

60 output/3-state

61 output/3-state

62 output/3-state

63 ground

64 output/3-state

65 output/3-state

66 supply

67 output/3-state

68 output/3-state

69 output/3-state

70 ground

71 input

72 input

73 input

74 input

75 ground

76 supply

77 ground

78 supply

79 ground

Imax

(mA)

DESCRIPTION

3 DRAM data interface bit 53

3 DRAM data interface bit 54

3 DRAM data interface bit 55

− ground for pad ring

3 DRAM data interface bit 56

3 DRAM data interface bit 57

3 DRAM data interface bit 58

3 DRAM data interface bit 59

− supply voltage for pad ring

3 DRAM data interface bit 60

3 DRAM data interface bit 61

3 DRAM data interface bit 62

3 DRAM data interface bit 63 (MSB)

− ground for pad ring

3 DRAM address interface bit 0 (LSB)

3 DRAM address interface bit 1

3 DRAM address interface bit 2

3 DRAM address interface bit 3

− supply voltage for pad ring

3 DRAM address interface bit 4

3 DRAM address interface bit 5

3 DRAM address interface bit 6

3 DRAM address interface bit 7

− ground for pad ring

3 DRAM address interface bit 8 (MSB)

6 DRAM column address strobe (active LOW)

− supply voltage for pad ring

3 DRAM row address strobe (active LOW)

3 DRAM write enable (active LOW)

3 DRAM chip select (active LOW)

− ground for pad ring

− video input signal bit 0 (LSB)

− video input signal bit 1

− video input signal bit 2

− video input signal bit 3

− ground for core logic

− supply voltage for core logic

− ground for core logic

− supply voltage for core logic

− ground for core logic

2000 May 03

8

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