C161S 데이터 시트보기 (PDF) - Infineon Technologies

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C161S

16-Bit Single-Chip Microcontroller

Infineon Technologies 

C161S

General Device Information

Table 2

Pin Definitions and Functions

Symbol Pin

No.

Input Function

Outp.

XTAL1 2

XTAL2 3

I

XTAL1: Input to the oscillator amplifier and input to the

internal clock generator

O XTAL2: Output of the oscillator amplifier circuit.

To clock the device from an external source, drive XTAL1,

while leaving XTAL2 unconnected. Minimum and maximum

high/low and rise/fall times specified in the AC

Characteristics (see Chapter 5.4) must be observed.

P3

P3.2 5

P3.3 6

P3.4 7

P3.5 8

P3.6 9

P3.7 10

P3.8 11

P3.9 12

P3.10 13

P3.11 14

P3.12 15

P3.13 16

IO Port 3 is a 12-bit bidirectional I/O port. It is bit-wise

programmable for input or output via direction bits. For a pin

configured as input, the output driver is put into high-

impedance state. Port 3 outputs can be configured as

push/pull or open drain drivers.

The following Port 3 pins also serve for alternate functions:

I

CAPIN GPT2 Register CAPREL Capture Input

O T3OUT GPT1 Timer T3 Toggle Latch Output

I

T3EUD GPT1 Timer T3 External Up/Down Control Input

I

T4IN GPT1 Timer T4 Count/Gate/Reload/Capture Inp.

I

T3IN GPT1 Timer T3 Count/Gate Input

I

T2IN GPT1 Timer T2 Count/Gate/Reload/Capture Inp.

I/O MRST SSC Master-Receive/Slave-Transmit Inp./Outp.

I/O MTSR SSC Master-Transmit/Slave-Receive Outp./Inp.

O TxD0 ASC0 Clock/Data Output (Async./Sync.)

I/O RxD0 ASC0 Data Input (Async.) or Inp./Outp. (Sync.)

O BHE External Memory High Byte Enable Signal,

O WRH External Memory High Byte Write Strobe

I/O SCLK SSC Master Clock Output / Slave Clock Input.

P4

P4.0 17

P4.1 18

P4.2 19

P4.3 20

P4.4 23

P4.5 24

IO Port 4 is a 6-bit bidirectional I/O port. It is bit-wise

programmable for input or output via direction bits. For a pin

configured as input, the output driver is put into high-

impedance state.

Port 4 can be used to output the segment address lines:

O

A16

Least Significant Segment Address Line

O

A17

Segment Address Line

O

A18

Segment Address Line

O

A19

Segment Address Line

O

A20

Segment Address Line

O

A21

Segment Address Line

Data Sheet

5

V1.0, 2003-11

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