SC28L198A1 데이터 시트보기 (PDF) - Philips Electronics
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상세내역
제조사
SC28L198A1 Datasheet PDF : 56 Pages
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Philips Semiconductors
Octal UART for 3.3V and 5V supply voltage
Product specification
SC28L198
Table of Contents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Uses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . 6
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Functional Description . . . . . . . . . . . . . . . . . . . . . 7
Conceptual Overview . . . . . . . . . . . . . . . . . . . . . . . 7
Host Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Asynchronous bus cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Synchronous bus cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Timing Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Crystal Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Sclk – System Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Baud Rate Generator BRG . . . . . . . . . . . . . . . . . . . . . . . . 8
BRG Counters (Used for random baud rate generation)
8
Channel Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Character Recognition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Interrupt Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Global Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
I/O Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Detailed Descriptions . . . . . . . . . . . . . . . . . . . . . . . 9
Receiver and Transmitter . . . . . . . . . . . . . . . . . . . 9
Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Status Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Transmission of ”break” . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1x and 16x modes, Transmitter . . . . . . . . . . . . . . . . . . . . . 10
Transmitter FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1x and 16x mode, Receiver . . . . . . . . . . . . . . . . . . . . . . . . . 10
Receiver Status Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Receiver FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
RxFIFO Status: Status reporting modes . . . . . . . . . . . . . . 11
I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
General Purpose Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Global Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Character Recognition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Xon Xoff Characters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Multi-drop or Wake up or 9 bit mode . . . . . . . . . . . . . . . . . 12
Character Stripping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Interrupt Arbitration and IRQN generation . . . . . . . . . . . . . . . . 12
IACKN Cycle, Update CIR . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Polling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Enabling and Activating Interrupt sources . . . . . . . . . . . . . 13
Setting Interrupt Priorities . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . 14
Major Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Minor Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Watch-dog Timer Time–out Mode . . . . . . . . . . . . . . . . . . . 15
Wake Up Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Xon/Xoff Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
REGISTER DEFINITIONS . . . . . . . . . . . . . . . . . . . . 18
MR – Mode Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
UCIR – Update CIR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
General Purpose Output Pin Control . . . . . . . . 30
Register Maps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Register Map Summary . . . . . . . . . . . . . . . . . . . . . 31
Register Map Detail . . . . . . . . . . . . . . . . . . . . . . . . 32
Reset Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Device Configuration after Hardware Reset or CRa cmd=x1F 41
Cleared registers: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Clears Modes for: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Disables: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Halts: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Limitations: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
DC Electrical Specifications (5V) . . . . . . . . . . . . 42
AC Electrical Characteristic (5V) . . . . . . . . . . . . 43
DC Electrical Specifications (3.3V) . . . . . . . . . . 45
AC Electrical Characteristics (3.3V) . . . . . . . . . . 46
INDEX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
DESCRIPTION
The Philips 28L198 Octal UART is a single chip CMOS–LSI
communications device that provides 8 full-duplex asynchronous
channels with significantly deeper 16 byte FIFOs, Automatic
in–band flow control using Xon/Xoff characters defined by the user
and address recognition in the wake up mode. Synchronous bus
interface is used for all communication between host and OCTART.
It is fabricated using Philips 1.0 micron CMOS technology that
combines the benefits of low cost, high density and low power
consumption.
The operating speed of each receiver and transmitter can be
selected independently from one of 22 fixed baud rates, a 16X clock
derived from one of two programmable baud rate counters or one of
three external 16X clocks (1 available at 1x clock rate). The baud
rate generator and counter can operate directly from a crystal or
from seven other external or internal clock inputs. The ability to
independently program the operating speed of the receiver and
transmitter makes the Octal UART particularly attractive for dual
speed full duplex channel applications such as clustered terminal
systems. The receivers and transmitters are buffered with FIFOs of
16 characters to minimize the potential for receiver overrun and to
reduce interrupt overhead. In addition, a handshaking capability and
in–band flow control are provided to disable a remote UART
transmitter when the receiver buffer is full or nearly so.
To minimize interrupt overhead an interrupt arbitration system is
included which reports the context of the interrupting UART via
direct access or through the modification of the interrupt vector. The
context of the interrupt is reported as channel number, type of
device interrupting ( receiver COS etc.) and, for transmitters or
receivers, the fill level of the FIFO.
The Octal UART provides a power down mode in which the
oscillator is stopped but the register contents are maintained. This
results in reduced power consumption of several orders of
magnitudes. The Octal UART is fully TTL compatible when
operating from a single +5V power supply. Operation at 3.3 volts is
maintained with CMOS interface levels.
The device also offered in a version which maintains TTL input and
output levels while operating with a 3.3 volt power supply.
1999 Jan 14
2
853–2047 20654
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