SC4520 데이터 시트보기 (PDF) - Semtech Corporation

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SC4520

3A Step-Down Switching Regulator with Adjustable Switching Frequency

Semtech Corporation 

SC4520

POWER MANAGEMENT

Application Information (Cont.)

One integrator is added at origin to increase the DC gain.

ωZ is used to cancel the power stage pole ωP1 so that the

loop gain has –20dB/dec rate when it reaches 0dB line.

ωP2 is placed at half switching frequency to reject high

frequency switching noises. Figure 4 gives the asymptotic

diagrams of the power stage with current loop closed

and its loop gain.

Loop gain T(s)

ωp1

Power stage

ωC

ωP2

ωZ

Figure 4. Asymptotic diagrams of power stage with

current loop closed and its loop gain.

The design guidelines for the SC4520 applications are

as following:

1. Set the loop gain crossover corner frequency ωC for

given switching corner frequency ωC = 2πfC

2. Place an integrator at the origin to increase DC and

low frequency gains.

3. Select ωZ such that it is placed at ωP1 to obtain a

-20dB/dec rate to go across the 0dB line.

4. Place a high frequency compensator pole

ωP2 (ωP2 = πfs) to get the maximum attenuation of

the switching ripple and high frequency noise with

the adequate phase lag at ωC.

2. Start the PCB layout by placing the power components

first. Arrange the power circuit to achieve a clean

power flow route. Put all power connections on one

side of the PCB with wide copper filled areas if

possible.

3. The VIN bypass capacitor should be placed next to

the VIN and GND pins.

4. The trace connecting the feedback resistors to the

output should be short, direct and far away from any

noise sources such as switching node and switching

components.

5. Minimize the loop including input capacitor, the

SC4520 and freewheeling diode D2. This loop passes

high di/dt current. Make sure the trace width is wide

enough to reduce copper losses in this loop.

6. Maximize the trace width of the loop connecting the

inductor, freewheeling diode D2 and the output

capacitor.

7. Connect the ground of the feedback divider and the

compensation components directly to the GND pin

of the SC4520 by using a separate ground trace.

8. Connect Pin 4 to a large copper area to remove the

IC heat and increase the power capability of the

SC4520. A few feedthrough holes are required to

connect this large copper area to a ground plane to

further improve the thermal environment of the

SC4520. The traces attached to other pins should

be as wide as possible for the same purpose.

Layout Guidelines:

In order to achieve optimal electrical and thermal

performance for high frequency converters, special

attention must be paid to the PCB layouts. The goal of

layout optimization is to identify the high di/dt loops and

minimize them. The following guidelines should be used

to ensure proper operation of the converters.

1. A ground plane is suggested to minimize switching

noises and trace losses and maximize heat

transferring.

 2006 Semtech Corp.

10

www.semtech.com

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