SG3526N 데이터 시트보기 (PDF) - ON Semiconductor
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SG3526N Datasheet PDF : 9 Pages
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SG3526
ELECTRICAL CHARACTERISTICS (VCC = +15 Vdc, TJ = Tlow to Thigh [Note 6], unless otherwise noted.)
Characteristics
Symbol Min
Typ
REFERENCE SECTION (Note 7)
Reference Output Voltage (TJ = +25°C)
Line Regulation (+8.0 V ≤ VCC ≤ +35 V)
Load Regulation (0 mA ≤ IL ≤ 20 mA)
Temperature Stability
Total Reference Output Voltage Variation
(+8.0 V ≤ VCC ≤ +35 V, 0 mA ≤ IL ≤ 20 mA)
Short Circuit Current (Vref = 0 V) (Note 5)
UNDERVOLTAGE LOCKOUT
Reset Output Voltage (Vref = +3.8 V)
Reset Output Voltage (Vref = +4.8 V)
OSCILLATOR SECTION (Note 8)
Initial Accuracy (TJ = +25°C)
Frequency Stability over Power Supply Range
(+8.0 V ≤ VCC ≤ +35 V)
Frequency Stability over Temperature
(ΔTJ = Tlow to Thigh)
Minimum Frequency
(RT = 150 kΩ, CT = 20 μF)
Maximum Frequency
(RT = 2.0 kΩ, CT = 0.001 μF)
Sawtooth Peak Voltage (VCC = +35 V)
Sawtooth Valley Voltage (VCC = +8.0 V)
ERROR AMPLIFIER SECTION (Note 9)
Input Offset Voltage (RS ≤ 2.0 kΩ)
Input Bias Current
Input Offset Current
DC Open Loop Gain (RL ≥ 10 MΩ)
High Output Voltage
(VPin 1−VPin 2 ≥ +150 mV, Isource = 100 μA)
Low Output Voltage
(VPin 2−VPin 1 ≥ +150 mV, Isink = 100 μA)
Common Mode Rejection Ratio (RS ≤ 2.0 kΩ)
Power Supply Rejection Ratio (+12 V ≤ VCC ≤ +18 V)
5. Maximum junction temperature must be observed.
6. Tlow = 0°C
Thigh = +125°C
7. IL = 0 mA unless otherwise noted.
8. fosc = 40 kHz (RT = 4.12 kΩ ± 1%, CT = 0.01 μF ± 1%, RD = 0 Ω)
9. 0 V ≤ VCM ≤ +5.2 V.
Vref
Regline
Regload
ΔVref/ΔT
ΔVref
ISC
4.90
−
−
−
4.85
25
5.00
10
10
10
5.00
80
−
0.2
2.4
4.8
Δfosc
Δ VCC
Δfosc
Δ TJ
fmin
fmax
Vosc(P)
Vosc(V)
−
−
−
−
400
−
0.45
±3.0
0.5
2.0
0.5
−
3.0
0.8
VIO
IIB
IIO
AVOL
VOH
VOL
CMRR
PSRR
−
2.0
−
−350
−
35
60
72
3.6
4.2
−
0.2
70
94
66
80
Max
5.10
30
50
−
5.15
125
0.4
−
±8.0
1.0
−
−
−
3.5
−
10
−2000
200
−
−
0.4
−
−
Unit
V
mV
mV
mV
V
mA
V
V
%
%
%
Hz
kHz
V
V
mV
nA
nA
dB
V
V
dB
dB
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