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SI-3025KS 데이터 시트보기 (PDF) - Unspecified

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SI-3025KS Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
qSI-3000KS Series
sExample of Solder Pattern Design
L
L
b2
e1
b
e
e
e
B1
B2
L
α
Symbol
e1
e
α
β1
β2
L
b2
l2
Dimensions (mm)
5.72
1.27±0.15
0.2
0.2 to 0.5
0.2
0.6
0.76
L+β1+β2
(Reference value conforming to EIAJ
Standard ED-7402-1)
*1 The inner frame stage on which a monolithic IC is mounted is
directly connected to the GND pins (pins 5 through 8). By
expanding the area of the copper connected to the GND pins,
the heat radiation can be improved. It is recommended to
design the solder pattern by opening the insulation film of the
solder patterns of pins 5, 6, 7, and 8, on the wide GND
pattern as shown in Figure 1.
l2
e1
eee
*1
GND pattern
b2
8 7 6 5 l2
e1
1234
eee
Figure 1
sReference Data
Thermal resistance vs. Copper area
Area of PC board : 40×40mm
140
120
100
80
60
40
10
100
Copper area (mm2)
1000
Power dissipation vs. Copper area
Tj=100°C Area of PC board : 40×40mm
1.2
Ta=25°C
1
Ta=50°C
Ta=80°C
0.8
0.6
0.4
0.2
0
10
100
Copper area (mm2)
1000
Calculating junction temperature
Measure the temperature TL of the lead of the GND pin (pin 7) by using a thermocouple, and substitute the
measured value into the following expression to calculate the junction temperature.
Tj=PD × θjL + TL ( θjL = 22°C/W)

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