SI3021 데이터 시트보기 (PDF) - Unspecified
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SI3021 Datasheet PDF : 54 Pages
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Si3035
Table 9. Switching Characteristics—Serial Interface (DCE = 1, FSD = 0)
(VA = Charge Pump, VD = 3.0 to 5.25 V, TA = 0 to 70°C for K-Grade, CL = 20 pF)
Parameter1,2
Symbol
Min
Typ
Max
Cycle Time, SCLK
tc
354
1/256 Fs
—
SCLK Duty Cycle
tdty
—
50
—
Delay Time, SCLK ↑ to FSYNC ↑
td1
—
—
10
Delay Time, SCLK ↑ to FSYNC ↓
td2
—
—
10
Delay Time, SCLK ↑ to SDO valid
td3
0.25tc – 20
—
0.25tc + 20
Delay Time, SCLK ↑ to SDO Hi-Z
td4
—
—
20
Delay Time, SCLK ↑ to RGDT ↓
td5
—
—
20
Delay Time, SCLK ↑ to RGDT ↑
td6
—
—
20
Setup Time, SDO Before SCLK ↓
tsu
25
—
—
Hold Time, SDO After SCLK ↓
th
20
—
—
Setup Time, SDI Before SCLK
tsu2
25
—
—
Hold Time, SDI After SCLK
th2
20
—
—
Notes:
1. All timing is referenced to the 50% level of the waveform. Input test levels are VIH = VD – 0.4 V, VIL = 0.4 V.
2. Refer to the section "Multiple Device Support" on page 25 for functional details.
Unit
ns
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
32 SCLKs
tc
16 SCLKs
16 SCLKs
SCLK
td1
td2
td2
FSYNC
(mode 1)
td5
FSYNC
(mode 0)
td6
td5
SDO
(m aster)
td3
tsu
th
D15 D14 D13
td4
D0
SDO
(slave 1)
FSD
(Mode 0)
FSD
(Mode 1)
td3
D15
td5
td2
SDI
tsu2
th2
D15
D14
D13
D0
Figure 4. Serial Interface Timing Diagram (DCE = 1, FSD = 0)
Rev. 1.2
9
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