STA020D 데이터 시트보기 (PDF) - STMicroelectronics
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STA020D Datasheet PDF : 12 Pages
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STA020
DIGITAL CHARACTERISTICS (Tamb = 25°C; VD+ = 3.3V ±10%)
Symbol
VIH
VIL
VOH
VOL
Iin
MCK
Parameter
High-Level Input Voltage
Low-Level Input Voltage
High-Level Output Voltage
Low-Level Output Voltage
Input Leakage Current
Master Clock frequency
Master Clock Duty Cycle
Test Condition
IO = 200µA
IO = 3.2mA
(Note 1)
(high time/cycle time)
Min.
2.0
-0.3
VDD-1.0
40
Typ.
1.0
Max.
VDD+0.3
+0.8
0.4
10
26
60
Unit
V
V
V
V
µA
MHz
%
Note 1: MCK must be 128x the input word rate, except in Transparent Mode where MCK is 256x the input word rate.
Figure 1. STA020 Professional & Consumer Modes Typical Connection Diagram.
EXTERNAL
CLOCK
+3.3V
AUDIO
DATA
PROCESSOR
µCONTROLLER
or
UNUSED
CHANNEL
STATUS BITS
CONTROL
FSYNC
SCK
SDATA
CBL
C
U
V
RST
MCK
5
7
6
8
15
10 STA020
11
9
16
VD+
19
18
24
23
22
21
20
17
8 DEDICATED C.S. BITS
GND
TRNPT
M0
M1
M2
TXP
TXN
0.1µF
SERIAL PORT
MODE SELECT
TRANSMITTER
CIRCUIT
D97AU600A
Figure 2. STA020 Typical Connection Diagram.
EXTERNAL
CLOCK
+5V
4/12
AUDIO
DATA
PROCESSOR
DECODER
SUBCODE
PORT
RESET
CONTROL
CHANNEL
STATUS BITS
CONTROL
FSYNC
7
SCK
6
SDATA
8
V
9
SBF
10
U
11
SBC
15
RST 16
MCK
5
VD+
19
18
GND
STA020
M0
23
M1
22
M2
21
TXP
20
TXN
17
8 DEDICATED C.S. BITS
0.1µF
SERIAL PORT
MODE SELECT
TRANSMITTER
CIRCUIT
See Appendix B
D99AU989A
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