SI4112G 데이터 시트보기 (PDF) - Silicon Laboratories

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SI4112G

DUAL-BAND RF S YNTHESIZER WITH INTEGRATED VCOS FOR GSM AND GPRS WIRELESS COMMUNICATIONS

Silicon Laboratories 

Si4133G

Register 2. Power Down Address Field (A[3:0]) = 0010

Bit D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2

Name 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

D1 D0

PDIB PDRB

Bit

17:2

1

0

Name

Reserved

PDIB

PDRB

Function

Program to zero.

Power Down IF Synthesizer.

0 = IF synthesizer powered down.

1 = IF synthesizer on.

Note: Always program to 0 for Si4113G.

Power Down RF Synthesizer.

0 = RF synthesizer powered down.

1 = RF synthesizer on.

Note: Always program to 0 for Si4112G.

Register 3. RF1 N Divider Address Field (A[3:0]) = 0011

Bit D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Name

NRF1[17:0]

Bit

17:0

Name

NRF1[17:0]

Function

N Divider for RF1 Synthesizer.

Register reserved for Si4112G, Si4122G. Writes to this register may result in unpre-

dictable behavior.

22

Rev. 1.1

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