SI4012 데이터 시트보기 (PDF) - Silicon Laboratories

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SI4012

CRYSTAL-LESSFSK/OOK RF TRANSMITTER

Silicon Laboratories 

Si4012

Table 4. Low Battery Detector Characteristics*

(TA = 25° C, VDD = 3.3 V, RL = 550 , unless otherwise noted)

Parameter

Battery Voltage Measurement Accuracy

Test Condition

Min

Typ

—

2

Max Unit

—

%

*Note: All specifications guaranteed by production test unless otherwise noted. Production test conditions and max limits are

listed in "1.1. Definition of Test Conditions" on page 7.

Table 5. Optional Crystal Oscillator Characteristics*

(TA = 25° C, VDD = 3.3 V, RL = 600 , unless otherwise noted)

Parameter

Test Condition

Min

Typ

Max Unit

Crystal Frequency Range

10

—

13

MHz

Input Capacitance (GPIO0)

GPIO0 configured as a crystal oscillator; —

3

XO_LOWCAP=1

—

pF

GPIO0 configured as a crystal oscillator; —

5.5

XO_LOWCAP=0

—

pF

Crystal ESR

GPIO0 configured as a crystal oscillator; —

XO_LOWCAP=1

—

120



GPIO0 configured as a crystal oscillator; —

XO_LOWCAP=0

—

80



Start-Up Time

Crystal oscillator only,

60 mH motional arm inductance

—

9

50

ms

*Note: All specifications guaranteed by production test unless otherwise noted. Production test conditions and max limits are

listed in "1.1. Definition of Test Conditions" on page 7.

Table 6. Thermal Conditions

Parameter

Ambient Temperature

Junction Temperature

Storage Temperature

Symbol

TA

TOP

TSTG

Value

–40 to 85

–40 to 90

–55 to 125

Unit

C

C

C

Table 7. Absolute Maximum Ratings1,2

Parameter

Symbol

Value

Unit

Supply Voltage

Input Current3

Input Voltage4

VDD

–0.5 to 3.9

V

IIN

10

mA

VIN

–0.3 to (VDD + 0.3)

V

Notes:

1. Permanent device damage may occur if the absolute maximum ratings are exceeded. Functional operation should be

restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond recommended

operating conditions for extended periods may affect device reliability.

2. Handling and assembly of these devices should only be done at ESD-protected workstations.

3. All input pins besides VDD.

4. For GPIO pins configured as inputs.

6

Rev 1.1

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