SI5330G-A00218-GM 데이터 시트보기 (PDF) - Silicon Laboratories

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SI5330G-A00218-GM

1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR

Silicon Laboratories 

Si5330

Table 4. Input and Output Clock Characteristics (Continued)

(VDD = 1.8 V –5% to +10%, 2.5 V ±10%, or 3.3 V ±10%, TA = –40 to 85 °C)

Parameter

HSTL Output Voltage

Symbol

VOH

VOL

Duty Cycle*

DC

*Note: Input clock has a 50% duty cycle.

Test Condition

VDDO = 1.4 to 1.6 V

Min

0.5xVDDO +0.3

—

45

Typ

Max

Units

—

—

V

—

0.5xVDDO

–0.3

V

—

55

%

Table 5. OEB Input Specifications

Parameter

Input Voltage Low

Input Voltage High

Input Resistance

Symbol

Test Condition

Min

Typ

Max

Unit

VIL

—

—

0.3 x VDD

V

VIH

0.7 x VDD

—

—

V

RIN

20

—

—

k

Table 6. Output Control Pins (LOS)

(VDD = 1.8 V –5% to +10%, 2.5 V ±10%, or 3.3 V ±10%, TA = –40 to 85 °C)

Parameter

Symbol

Condition

Min

Typ

Max Unit

Output Voltage Low

Rise/Fall Time 20–80%

VOL

ISINK = 3 mA

0

tR/tF CL < 10 pf, pull up 1 k

—

—

0.4

V

—

10

ns

Table 7. Jitter Specifications

(VDD = 1.8 V –5% to +10%, 2.5 V ±10%, or 3.3 V ±10%, TA = –40 to 85°C)

Parameter

Symbol

Test Condition

Min

Additive Phase Jitter

(12 kHz–20 MHz)

0.7 V pk-pk differential input

tRPHASE clock at 622.08 MHz with

—

70 ps rise/fall time

Additive Phase Jitter

(50 kHz–80 MHz)

0.7 V pk-pk differential input

tRPHASEWB clock at 622.08 MHz with

—

70 ps rise/fall time

Typ

0.150

0.225

Max

Unit

— ps RMS

— ps RMS

Table 8. Thermal Characteristics

Parameter

Thermal Resistance

Junction to Ambient

Thermal Resistance

Junction to Case

Symbol

JA

JC

Test Condition

Still Air

Still Air

Value

37

25

Unit

°C/W

°C/W

Rev. 1.0

7

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