MUSA16P14-B456C 데이터 시트보기 (PDF) - Music Semiconductors
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MUSA16P14-B456C Datasheet PDF : 44 Pages
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Ball Descriptions
Epoch MultiLayer Switch Chipset
Table 1: Ball Descriptions (continued)
Functional
Group
CRI RCP.
Glue free Con-
nection to the
MUSIC MUAC
RCP.
(continued)
Ball Name(s)
(Appended b
indicates
active low signal)
RCPDSC
RCPDQ[31:0]
Function
Data Segment Control
Output
RCP Data Bus
RCPEb
RCP Chip Enable
RCPOEb
RCP Output Enable
RCPRESETb RCP Reset
RCPVBb
RCP Validity Bit
RCPWb
RCP Write Enable
RCPADDR[14:0]
CRI Shared RCP and Associated Data SRAM
Address Bus. Connect to AA12:0 on RCPs and to
Address pins of CRI SRAM.
Interface to the
CRI Associated
Data SRAM
SRAMADDR [16:15] CRI High SRAM Address Bits
SRAM Address [16:15]
SRAMDQ[15:0] CRI SRAM
Data Bus
Processor
Interface
SRAMOEb
SRAMWEb
PDATA[31:0]
CRI SRAM
Output Enable
CRI SRAM
Write Enable
Processor Data Bus
Type
PBGA Ball(s)
Output AF3
TTL
Bidir
TTL
3.3V
Only
b0:AC5, b1:AF6, b2:AE6, b3:AD6,
b4:AC6, b5:AF7, b6:AE7, b7:AD7,
b8:AC7, b9:AF8, b10:AE8,
b11:AD8, b12:AC8, b13:AF9,
b14:AE9, b15:AD9, b16:AC9,
b17:AF10, b18:AE10, b19:AD10,
b20:AC10, b21:AF11, b22:AE11,
b23, AD11, b24:AC11, b25:AF12,
b26:AE12, b27:AD12, b28:AC12,
b29:AF13, b30:AE13, b31:AD13
Output AD1
TTL
Output AD2
TTL
Output AD4
TTL
Bidir AE3
TTL
3.3V
Only
Output AF2
TTL
Bidir
TTL
3.3V
Only
b0:W3, b1:W4, b2:Y1, b3:Y2,
b4:Y3, b5:Y4, b6:AA1, b7:AA2,
b8:AA3, b9:AA4, b10:AB1,
b11:AB2, b12:AB3, b13:AB4,
b14:AC1
Output b15:AC2, b16:AC3
TTL
Bidir
TTL
3.3V
Only
b0:R3, b1:R4, b2:T1, b3:T2,
b4:T3, b5:T4, b6:U1, b7:U2,
b8:U3, b9:U4, b10:V1, b11:V2,
b12:V3, b13:V4, b14:W1,
b15:W2
Output R2
TTL
Output R1
TTL
Bidir b0:C1, b1:D1, b2:D2, b3:D3,
TTL b4:E1, b5:E2, b6:E3, b7:E4,
5V Tol. b8:F1, b9:F2, b10:F3, b11:F4
b12:G2, b13:G3, b14:G4,
b15:H1, b16:H2, b17:H3,
b18:H4, b19:J1, b20:J2, b21:J3,
b22:J4, b23:K1, b24:K2,
b25:K3, b26:K4, b27:L1, b28:L2,
b29:L3, b30:L4, b31:M1
Rev. 2.7 Draft
7
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