CF8224C 데이터 시트보기 (PDF) - Nippon Precision Circuits
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CF8224C Datasheet PDF : 11 Pages
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SM8224C
PIN DESCRIPTION
Number
1
2
3
4
5
6
7
8
9
10
Name
AGND
TIP
RING
TRQ
GND
OSCIN
OSCOUT
MODE
TEST
DOUT
11
STR
12
DTDET
13
CR
14
CDET
15
VDD
16
S1
17
S0
18
DTQ
19
DT2
20
DT1
I/O
Function
O
Reference voltage output. Internal reference voltage (VDD/2) output level
I
Tip input. Connected to the telephone line through a protection circuit
I
Ring input. Connected to the telephone line through a protection circuit
O
Input-stage amplifier gain-select output. Used to adjust the gain of the input-stage amplifier.
–
Ground. Connected to the system ground potential.
I
Crystal oscillator input. The crystal oscillator element is connected between this pin and OSCOUT.
O
Crystal oscillator output. The crystal oscillator element is connected between this pin and OSCIN.
I
When MODE is HIGH, and S1 and S0 are both LOW, the device is in power-down state. See table 2.
–
TEST pin. Set OPEN when normal using.
O
Data output. Demodulated FSK signal output. HIGH level output when CDET goes HIGH.
Dual-tone confirmation output. Function is selected by S0 and S1. See table 2.
O
Dual-tone confirmation: Active-LOW output when dual tone detection signal passes through RC time
constant delay circuit.
O
Dual-tone detector output. HIGH-level output when dual tone is detected.
I/O
Dual tone RC time constant circuit connection. The dual tone detection signal passes through the RC
network to generate the STR signal.
O
FSK signal carrier detector output. LOW-level when active carrier is detected.
–
Supply
I
Function select bit 1. Selects the device mode in combination with S0 and MODE. See table 2.
I
Function select bit 1. Selects the device mode in combination with S1 and MODE. See table 2.
O
Dual-tone signal input-stage amplifier output. Used to adjust the gain of the input-stage amplifier.
I
Dual-tone signal input-stage operational amplifier inverting input
I
Dual-tone signal input-stage operational amplifier non-inverting input
SEIKO NPC CORPORATION —4
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