LA9220M 데이터 시트보기 (PDF) - SANYO -> Panasonic

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LA9220M

Analog Signal Processor Circuit (ASP) for CD Players

SANYO -> Panasonic 

LA9220M

· Focus determination

Focus is assumed to be obtained when the focus error signal “S” curve reaching REF +0.2V is detected, and the “S”

curve subsequently returns to REF.

· DEFECT

The mirrored surface level is maintained by the capacitor for LF2 (pin 59) ; when a drop in the EFM signal (RFSM

output) reaches 0.35V or more, a high signal is output to DEF (pin 49). If DEF (pin 49) goes high, the tracking servo

enters THLD mode. In order to prevent the tracking servo from entering THLD mode when a defect is detected,

prevent DEFECT from being output by either shorting DEF (pin 49) to GND, or shorting LF2 (pin 59) to GND. The

DEFECT output is driven by constant current (approximately 100µA).

· VCC /REF/GND

VCC1 (pin 64)

VCC2 (pin 56)

AGND (pin 22)

DGND (pin 45)

: RF system

: SERVO system, DIGITAL system

: RF system, SERVO system

: DIGITAL system

· PLL circuit

VCOC is the loop filter setting amplifier for the EFM signal PLL, and equalizes the PLL phase comparison output

from the DSP, and outputs it to the internal VCO.

VCO is the VCO circuit for the EFM signal PLL, and requires the reference clock from the DSP (4.23MHz only ;

does not support 2.1609MHz for the LC7860KA, etc.). The VCO free-running frequency can be varied according to

the current input to LF (pin 55). The VCO output can be turned on or off by using the VCO-OLT ON/OFF command.

Command

VCO output frequency

Normal speed Average : 8.6436 MHz

Double speed Average : 17.2872 MHz

· Reset circuit

The power-on reset is released when VCC exceeds approximately 2.8V.

· Microprocessor interface

Because the Reset (Nothing) command initializes the LA9220M, it must be used carefully.

The LA9220M command acceptance (mode switching) timing is defined by the internal clock (4.23MHz divided to

130kHz) after the falling edge of CE (RWC) ; therefore, when commands are sent consecutively, CE must go low for

at least 10µs. For this reason, the 4.23MHz clock is required even when VCO of LA9220M is not used. 2BYTE-

COMMAND RESET is used only for the purpose of masking two-byte data.

All instructions can be input by setting CE high and sending commands synchronized with the CL clock from the

microprocessor to DAT (pin 52) in LSB first format. Note that the command is executed at the falling edge of CE.

No.5188–9/20

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