W88111AF 데이터 시트보기 (PDF) - Winbond

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W88111AF

ATAPI CD-ROM Decoder & Controller

Winbond 

W88111AF/W88112F

ATAPI CD-ROM Decoder & Controller

This specification is subject to change without notice.

Preliminary/Confidential

ATERR - ATAPI Error Register (write 31h)___________________________________________________47

ATFEA - ATAPI Feature Register (read 31h) _________________________________________________47

ATINT - ATAPI Interrupt Reason Register (read/write 32h) ______________________________________47

ATSPA - ATAPI SAM Tag Bytes Register (read/write 33h)_______________________________________48

ATBLO - ATAPI Byte Count Low (read/write 34h) _____________________________________________48

ATBHI - ATAPI Byte Count High (read/write 35h) _____________________________________________48

ATDRS - ATAPI Drive Select (read/write 36h) ________________________________________________48

ATSTA - ATAPI Status Register (read 38h, write 37h) __________________________________________48

ATCMD - ATAPI Command Register (read 37h)_______________________________________________48

ASSTA - ATAPI Shadow Status Register - (write 38h)___________________________________________49

ASERR - ATAPI Shadow Error Register - (write 39h)___________________________________________49

APKSTA - Status Register for Automatic Packet Transfer - (write 3Dh) ____________________________49

ASCSTA - Status Register for Automatic Status Completion - (write 3Eh) ___________________________49

SHDC - Shadow Drive Control Register _____________________________________________________50

DF0 to DF7 - uP to Host Data Transfer Registers - (write 40h to 47h) _____________________________50

Ring Control Registers - (read/write 50h to 57h) ______________________________________________51

DTRBL/DTRBH - Data Transfer Ring Base Register - (read/write 50h/51h) _________________________51

DTRCL/DTRCH - Data Transfer Ring Ceiling Register - (read/write 52h/53h)_______________________51

WBRBL/WBRBH - Write Buffer Ring Base Register - (read/write 54h/55h)__________________________51

WBRCL/WBRCH - Write Buffer Ring Ceiling Register - (read/write 56h/57h) _______________________51

SCTC - Subcode Timer Control Register - (write 5Ah) __________________________________________51

TARCTL - Target Control Register - (write 80h)_______________________________________________52

TARSTA - Target Status Register - (read 80h)_________________________________________________52

DSTH/DSTL - Decoding Sector Threshold Register - (write 82h/81h) ______________________________53

DSCH/DSCL - Decoding Sector Counter - (read 82h/81h)_______________________________________53

TSL - Target Search Limit Register - (write 83h) ______________________________________________53

TSC - Target Search Counter - (read 83h)____________________________________________________54

Target Header Register - (read/write 84h-86h) ________________________________________________54

TMIN - Target Minute Register - (read/write 84h) _____________________________________________54

TSEC - Target Second Register - (read/write 85h) _____________________________________________54

TFRAM - Target Frame Register - (read/write 86h) ____________________________________________54

FEACTL - Feature Control Register - (write 88h)______________________________________________54

Status Mask Register - (write 8Ch-8Fh)______________________________________________________55

Publication Release Date: Aug, 1996

-3-

Preliminary/ Confidential Revision A0.1

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