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W88111AF 데이터 시트보기 (PDF) - Winbond

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W88111AF Datasheet PDF : 64 Pages
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W88111AF/W88112F
ATAPI CD-ROM Decoder & Controller
This specification is subject to change without notice.
Preliminary/Confidential
PIN DESCRIPTIONS
The following convention is used in the pin description table below:
(I) denotes an input
(O) denotes an output
(OZ) denotes a tri-state output
(OD) denotes an open-drain output
(I/O) denotes a bi-directional signal
Miscellaneous Pins
NAME
NO.
PAR/PJ
12
CLKO
13
XIN
XOUT
HRSTb
ARSTb
CRSTb
VDD
GND
NC
15
14
21
60
75
41, 89
1, 16, 30, 46,
51, 66, 80, 94
7, 24, 58, 64,
72, 86
TYPE
I/O
O
I
O
I
OD
I
PIN DESCRIPTION
RAM Parity Data/Drive Jumper - As a RAM parity bit when
PJSEL (19h.6) is high and as a drive select jumper when PJSEL
is low.
Clock Output - If CLKOS (1Ah.3) is low, CLKO pin will supply
clock signal of one-half the crystal frequency. If CLKOS is high,
CLKO pin will supply normal crystal frequency.
Crystal Input/Output - Normally, XIN and XOUT are connected to
a crystal.
Host Reset - A pin receives reset signal from the host.
ATAPI Reset - After receiving an ATAPI Soft Reset command,
this pin becomes active-low when ARSTEN (2Fh.3) is enabled.
Chip Reset - Forcing this input low to reset the whole chip.
Power Supply Pin - 5.0V ± 5%
Ground Pin
No Connected Pin
Micro-controller Interface
NAME
NO.
TYPE
UD[7:0]
22, 23, 25, 26, I/OZ
27, 28, 29, 31
URS
32
I
URDb
33
I
UWRb
34
I
UCSb
35
I
PIN DESCRIPTION
Microprocessor Data Bus - Bi-directional processor data lines.
Register Select - To select address register or internal register.
Microprocessor Read Strobe - A low-active signal.
Microprocessor Write Strobe - A low-active signal.
Microprocessor Chip Select - A low-active signal.
Publication Release Date: Aug, 1996
-8-
Preliminary/ Confidential Revision A0.1

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