VSC8110GB 데이터 시트보기 (PDF) - Vitesse Semiconductor
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VSC8110GB
Vitesse Semiconductor
VSC8110GB Datasheet PDF : 20 Pages
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VITESSE
VSC8110
Data Sheet
Signal
Pin
_VSCIPNC
30
VTTL
31
_VSCOPNC
32
RX50MCK
33
VCC
34
RXOUT0
35
RXOUT1
36
VCC
37
RXOUT2
38
RXOUT3
39
VCC
40
RXOUT4
41
RXOUT5
42
VCC
43
RXOUT6
44
RXOUT7
45
VCC
46
RXLSCKOUT
47
FP
48
VTTL
49
NC
50
NC
51
NC
52
NC
53
VMM
54
VCC
55
REFCLK+
56
REFCLK-
57
VTTL
58
VCC
59
VCC
60
NC
61
NC
62
ATM/SONET/SDH 155/622 Mb/s Transceiver
Mux/Demux with Integrated Clock Generation
I/O
Level
Pin Description
I
TTL
Test mode input. Tie low for system operation
+5.0V +5 volt supply
O
VECL Test mode output
O
TTL
Constant 51.84Mhz reference clock output, derived from the
Clock Multiplier Unit
GND Ground
O
TTL
Receive output data bit0
O
TTL
Receive output data bit1
GND Ground
O
TTL
Receive output data bit2
O
TTL
Receive output data bit3
GND Ground
O
TTL
Receive output data bit4
O
TTL
Receive output data bit5
GND Ground
O
TTL
Receive output data bit6
O
TTL
Receive output data bit7
GND Ground
O
TTL
Receive byte clock output
O
TTL
Frame detection pulse
+5.0V +5 volt supply
No connection
No connection
No connection
No connection
+2V
+2 volt supply
GND
Ground
I
VECL Differential reference clock input+, refer to table 13
I
VECL Differential reference clock input-, refer to table 13
+5.0V +5 volt supply (CMU)
GND
Ground (CMU)
GND
Ground (CMU)
No connection
No connection
G51011-0, Rev. 1.5
® VITESSE Semiconductor Corporation
Page 13
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