UDA1342TS 데이터 시트보기 (PDF) - Philips Electronics
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UDA1342TS Datasheet PDF : 44 Pages
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Philips Semiconductors
Audio CODEC
Preliminary specification
UDA1342TS
handbook, full pagewidth
from
decimation
filter
from
digital
interface
input
DE-EMPHASIS
VOLUME
AND
MUTE
VOLUME
AND
MUTE
+
BASS BOOST
AND
+
TREBLE
to
digital
interface
output
master
VOLUME
AND
MUTE
MGT019
to
interpolation
filter
Fig.5 Digital mixer (DAC).
8.8 Noise shaper
The 5th-order noise shaper operates at 64fs. It shifts
in-band quantization noise to frequencies well above the
audio band. This noise shaping technique enables high
signal-to-noise ratios to be achieved. The noise shaper
output is converted into an analog signal using a Filter
Stream Digital-to-Analog Converter (FSDAC).
8.9 Filter stream DAC
The FSDAC is a semi-digital reconstruction filter that
converts the 1-bit data stream of the noise shaper to an
analog output voltage. The filter coefficients are
implemented as current sources and are summed at
virtual ground of the output operational amplifier. In this
way very high signal-to-noise performance and low clock
jitter sensitivity is achieved. A post-filter is not needed due
to the inherent filter function of the DAC. On-board
amplifiers convert the FSDAC output current to an output
voltage signal capable of driving a line output.
The output voltage of the FSDAC is proportionally to the
power supply voltage.
8.10 Digital interface
The UDA1342TS supports the following data input/output
formats for the various modes (see Fig.6).
L3-bus and I2C-bus mode:
• I2S-bus format with data word length of up to 24 bits
• MSB-justified serial format with data word length of up to
24 bits
• LSB-justified serial format with data word lengths of
16, 20 or 24 bits
• MSB-justified data output and
LSB-justified 16, 20 and 24 bits data input.
Static pin mode:
• I2S-bus format with data word length of up to 24 bits
• MSB-justified data output and
LSB-justified 16, 20 and 24 bits data input.
2000 Mar 29
10
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