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SP800MCN

Low Power Microprocessor Supervisory with Battery Switch-Over

Signal Processing Technologies 

4) Watchdog function ➡ Monitors µP activity

where the watchdog output goes to a logic

LOW state if the watchdog input is not

toggled for greater than the timeout period.

5) Internal switch ➡ Switches over from VCC

to VBATT if the VCC falls below the reset

threshold.

15

RESET

Corporation

TO µP RESET

10kΩ

RESET and RESET Outputs

The SP691A/693A/800L/800M devices'

RESET and RESET outputs ensure that the µP

powers up in a known state, and prevents

code-execution errors during power-down or

brownout conditions.

The RESET output is active low, and typically

sinks 3.2mA at 0.1V saturation voltage in its

active state. When deasserted, RESET sources

1.6mA at typically VOUT – 0.5V. RESET output

is open drain, active high, and typically sinks

3.2mA with a saturation voltage of 0.1V. When

no backup battery is used, RESET output is

guaranteed to be valid down to VCC = 1V, and

an external 10kΩ pull-down resistor on RESET

ensures that RESET will be valid with VCC

down to GND as shown on Figure 18. As VCC

goes below 1V, the gate drive to the RESET

output switch reduces accordingly, increasing

the RDS(ON) and the saturation voltage. The

10kΩ pull-down resistor ensures the parallel

combination of switch plus resistor is around

Figure 18. External Pull-down Resistor Ensures

RESET is Valid with VCC Down to Ground.

10kΩ and the output saturation voltage is below

0.4V while sinking 40µA. When using a 10kΩ

external pull-down resistor, the high state for

the RESET output with Vcc = 4.75V is 4.5V

typical. For battery voltages less than or equal

to 2V connected to VBATT, RESET and RESET

remains valid for VCC from 0V to 5.5V.

RESET and RESET are asserted when V falls

CC

below the reset threshold and remain asserted

for the Reset Timeout Period (200ms nominal)

after VCC rises above the reset threshold voltage

on power-up. Refer to Figure 19. The devices'

battery-switchover comparator does not affect

reset assertion. However, both reset outputs are

asserted in battery-backup mode since VCC must

be below the reset threshold to enter this mode.

Vcc

RESET

THRESHOLD

CE IN

CE OUT

RESET

RESET

12µ

100µs

100µs

Figure 19. Reset and Chip-Enable Timing

Date: 4/18/05

SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over © Copyright 2005 Sipex Corporation

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