SP8542 데이터 시트보기 (PDF) - Signal Processing Technologies

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SP8542

Two and Four Channel 12-Bit Multiplexed Sampling ADCs

Signal Processing Technologies 

there is no connection made between VDA and

the system power supply. This is because

the analog supply pin (VDA) is connected

internally to the digital supply pin (VDD) through

a ten ohm resistor.

This connection when combined with a parallel

combination of 6.8µF tantalum and 0.1µF

ceramic capacitor between VDA and analog

ground, will provide some immunity to noise

which resides on the system supply. To

maintain maximum system accuracy, the

supply connected to the VDD pin should be well

isolated from digital supplies and wide load

variations.

To limit effects of digital switching elsewherein

a system, it often makes sense to run a seperate

+5Vsupply conductor from the supply requlator

to any analog components requiring +5V

including the SP8542 and SP8544. Noise on the

power supply lines can degrade the converters

performance, especially corrupting are noise

and spikes from a switching power supply.

The ground pins (AGND and VSS) on the

SP8542 and SP8544 are separated internally

and should be connected to each other under the

converter. The use of separate Analog & Digital

ground planes is usually the best technique for

preserving dynamic performance and reducing

noise coupling into sensitive converter circuits.

Where any compromise must be made the

common return of the analog input signal should

be referenced to the AGND pin of the converter.

This prevents any voltage drops that might

occur in the power supply common returns from

appearing in series with the input signal.

Coupling between analog and digital lines should

be minimized by careful layout. For instance, if

analog and digital lines must cross they should

do so at right angles. Parallel analog and digital

lines should be separated from each other by a

trace connected to common.

If external gain and offset potentiometers are

used, the potentiometers and related resistors

should be located as close to the SP8542 and

SP8544 as possible.

Minimizing "Glitches"

Coupling of external transients into an analog to

digital converter can cause errors which are

difficult to debug. In addition to the above

discussions on layout considerations, bypassing

and grounding, there are several other useful

steps that can be taken to get the best analog

performance from a system using the SP8542 or

SP8544 converter. These potential system

problem sources are particularly important to

consider when developing a new system, and

looking for causes of errors in breadboards.

First, care should be taken to avoid transients

during critical times in the sampling and

conversion process. Since the SP8542 and

SP0544 have internal sample/hold function the

signal that puts the device into hold state (CS)

going low is critical, as it would be on any

sample/hold amplfier. The CS falling edge

should have 5 to 10 ns transition time, low jitter,

and have a minimal ringing, especially during

the first 35 ns after it falls.

SP8542/8544DS/01

SP8542/8544 Two and Four Channel 12-Bit Multiplexed Sampling ADC's

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© Copyright 2000 Sipex Corporation

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