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SP8790 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc

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SP8790
ZARLINK
Zarlink Semiconductor Inc ZARLINK
SP8790 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
SP8790
60MHz44 (2-MODULUS EXTENDER)
ADVANCE INFORMATION
DS3675-1·2
The SP8790 is a divide-by-four counter designed for use
with 2-modulus dividers. It increases the minimum division
ratio of the 2-modulus divider while retaining the same difference
in division ratio. The device is suitable for use in low power
frequency synthesis interfacing to CMOS or TTL.
FEATURES
s Very Low Power
s Control Input and Counter Output will Interface Directly
to TTL or CMOS
s Interfaces to GPS SP8000 Series Programmable
2-Modulus Dividers
QUICK REFERENCE DATA
s Supply Voltage: 5·0V
s Power Consumption: 40mW
s Temperature Range: 255°C to 1125°C (A Grade)
230°C to 170°C (B Grade)
ABSOLUTE MAXIMUM RATINGS
Supply voltage
Open collector output voltage
Storage temperature range
Max. junction temperature
Max. clock input voltage
Output sink current
8V
12V
265°C to 1150°C
1175°C
2·5V p-p
10mA
CLOCK INPUT
CLOCK INPUT
VCC
CONTROL INPUT
VEE
78 1
6
2
54 3
CONTROL OUTPUT
COUNTER OUTPUT
NC
CM8
Fig. 1 Pin connections - bottom view
ORDERING INFORMATION
SP8790 A CM
SP8790 B CM
CONTROL 2
OUTPUT
CONTROL
INPUT
6
D
Q
D
Q
CK CK
VCC
1
DQ
DQ
CK CK
OUTPUT
STAGE
3 OPEN COLLECTOR
COUNTER OUTPUT
8
7
CLOCK INPUT CLOCK INPUT
5
VEE (0V)
NOTE:
NEGATIVE GOING OUTPUT
SHOULD CLOCK FOLLOWING STAGE
Fig. 2 Functional diagram

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