SPLC783A
4. SIGNAL DESCRIPTIONS
Mnemonic
PIN No.
Type
Description
VDD
49
I
Power input
VSS
34
I
Ground
OSC1
36
-
Both OSC1 and OSC2 are connected to resistor for internal oscillator circuit. For
OSC2
35
external clock operation, the clock is input to OSC1.
V1 - V5
37 - 41
I
Supply voltage for LCD driving.
E
48
I
A start signal for reading or writing data.
R/W
47
l RS
46
entia Only DB0-DB3
DB4 - DB7
fid e CLK1
s CLK2
on U M
D
50 - 53
54 - 57
42
43
44
45
C R SEG1 - SEG33
s E SEG34 - SEG80
lu IN COM1 - COM16
FSoruPnpARTM TEST
33 - 1
121 - 75
59 - 74
58
I
A signal for selecting read or write actions.
1: Read, 0: Write.
I
A signal for selecting registers.
1: Data Register (for read and write)
0: Instruction Register (for write),
Busy flag - Address Counter (for read).
I/O
Low 4-bit data
I/O
High 4-bit data
O
Clock to latch serial data D.
O
Clock to shift serial data D.
O
Switch signal to convert LCD waveform to AC.
O
Sends character pattern data corresponding to each common signal serially.
1: Selection, 0: Non-selection.
O
Segment signals for LCD.
O
Common signals for LCD.
I
TEST pin. This pin must be fixed to VDD or open.
© Sunplus Technology Co., Ltd.
5
Proprietary & Confidential
MAR. 10, 2005
Version: 1.4