SPLC783A 데이터 시트보기 (PDF) - Unspecified
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SPLC783A Datasheet PDF : 38 Pages
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SPLC783A
5.3. Instruction Table
Instruction Code
Execution time
Instruction
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Description
Fosc= Fosc= Fosc=
190KHz 270KHz 350KHz
Clear Display
Write "20H" to DDRAM
0 0 0 0 0 0 0 0 0 1 and set DDRAM address 2.16ms 1.52ms 1.18ms
to "00H" from AC
Return Home
Entry Mode
Set
Display ON/
OFF Control
Cursor or
Display Shift
Function Set
Set CGRAM
Address
Set DDRAM
Address
Set DDRAM address to
"00H" from AC and
0
0
0
0
0
0
0
0
1
- return cursor to its 2.16ms 1.52ms 1.18ms
l original position if shifted.
tia ly The contents of DDRAM
are not changed.
n n Assign cursor moving
e O 0 0 0 0 0 0 0 1 I/D S direction and enable the 53s
38s
29s
shift of entire display
fid e Set
display
(D),
n s 0
0
0
0
0
0
1
D
C
cursor(C), and blinking of
B
53s
cursor(B) on/off control
38s
29s
o U bit.
Set cursor moving and
s C ER 0 0 0 0 0 1 S/C R/L -
display shift control bit,
- and the direction, without
53s
38s
29s
lu changing of DDRAM
INdata.
p Set interface data length
n M (DL: 8-bit/4-bit), numbers
u T 0 0 0 0 1 DL N F -
of display line (N:
-
2-line/1-line) and, display
53s
38s
29s
S R font type (F:5x10
A dots/5x8 dots)
P 0
0
0
Set CGRAM address in
1 AC5 AC4 AC3 AC2 AC1 AC0
53s
address counter.
38s
29s
or0
0
Set DDRAM address in
1 AC6 AC5 AC4 AC3 AC2 AC1 AC0
53s
address counter
38s
29s
F Whether during internal
Read Busy Flag
and Address
Counter
operation or not can be
known by reading BF.
0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0
The contents of address
counter can also be
read.
Write Data to
RAM
1
Write data into internal
0 D7 D6 D5 D4 D3 D2 D1 D0
53s
RAM (DDRAM/CGRAM).
38s
29s
Read Data from
RAM
Note: "-": don't care
1
Read data from internal
1 D7 D6 D5 D4 D3 D2 D1 D0
53s
RAM (DDRAM/CGRAM).
38s
29s
© Sunplus Technology Co., Ltd.
9
Proprietary & Confidential
MAR. 10, 2005
Version: 1.4
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