SPA11N60C2 데이터 시트보기 (PDF) - Infineon Technologies

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SPA11N60C2

Cool MOS Power Transistor

Infineon Technologies 

Final data

SPP11N60C2, SPB11N60C2

SPA11N60C2

Electrical Characteristics

Parameter

Symbol

Conditions

Characteristics

Transconductance

gfs

Input capacitance

Ciss

Output capacitance

Coss

Reverse transfer capacitance Crss

Effective output capacitance,4) Co(er)

energy related

Effective output capacitance,5) Co(tr)

time related

VDS ≥2*ID *RDS(on)max,

ID =7A

VGS=0V, VDS=25V,

f=1MHz

VGS=0V,

VDS=0V to 480V

Turn-on delay time

td(on)

Rise time

tr

Turn-off delay time

td(off)

Fall time

tf

Gate Charge Characteristics

VDD=380V, VGS=0/13V,

ID =11A,

RG=6.8Ω, Tj=125°C

Gate to source charge

Gate to drain charge

Gate charge total

Qgs

Qgd

Qg

VDD=350V, ID=11A

VDD=350V, ID=11A,

VGS=0 to 10V

Gate plateau voltage

V(plateau) VDD=350V, ID=11A

Values

Unit

min. typ. max.

3

6

-S

- 1460 - pF

- 610 -

-

21

-

-

45

-

-

85

-

-

13

- ns

-

40

-

-

48 72

-

9 13.5

- 10.5 - nC

-

24

-

- 41.5 54

-

8

-V

1Limited only by maximum temperature

2Repetitve avalanche causes additional power losses that can be calculated asPAV =EAR*f.

3Device on 40mm*40mm*1.5mm epoxy PCB FR4 with 6cm² (one layer, 70 µm thick) copper area for drain

connection. PCB is vertical without blown air.

4Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS.

5Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.

Page 3

2002-08-12

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