SPT9691 데이터 시트보기 (PDF) - Cadeka Microcircuits LLC.
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SPT9691 Datasheet PDF : 10 Pages
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SPT9691
WIDE INPUT VOLTAGE, JFET COMPARATOR
FEATURES
• Common Mode Range -4.0 to +8.0 V
• Low Input Bias Current <100 pA
• Propagation Delay 2.5 ns (max)
• Low Offset ±25 mV
• Low Feedthrough and Crosstalk
• Differential Latch Control
APPLICATIONS
• Automated Test Equipment
• High-Speed Instrumentation
• Window Comparators
• High-Speed Timing
• Line Receivers
• High-Speed Triggers
• Threshold Detection
• Peak Detection
GENERAL DESCRIPTION
The SPT9691 is a high-speed, wide common mode voltage,
JFET input, dual comparator. It is designed for applications
that measure critical timing parameters in which wide com-
mon mode input voltages of -4.0 to +8.0 V are required.
Propagation delays are constant for overdrives greater than
200 mV.
JFET inputs reduce the input bias currents to the nanoamp
level, eliminating the need for input drivers and buffers in
most applications. The device has differential analog inputs
and complementary logic outputs compatible with ECL sys-
tems. Each comparator has a complementary latch enable
control that can be driven by standard ECL logic.
The SPT9691 is available in 20-lead PLCC, 20-lead plastic
DIP and 20-contact LCC packages over the commercial
temperature range. It is also available in die form.
BLOCK DIAGRAM
QA
QA
GNDA
LEA
LEA
DVEE(A)
A
AVEE(A)
AVCC(A)
-INA
+INA
QB
QB
GNDB
LE B
LE B
B
DV EE(B)
AV EE (B)
AVCC (B)
-INB
+IN B
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