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DM7442AN(2002) 데이터 시트보기 (PDF) - Fairchild Semiconductor

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DM7442AN
(Rev.:2002)
Fairchild
Fairchild Semiconductor Fairchild
DM7442AN Datasheet PDF : 4 Pages
1 2 3 4
Absolute Maximum Ratings(Note 1)
Supply Voltage
7V
Input Voltage
5.5V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range
65°C to +150°C
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Symbol
VCC
VIH
VIL
IOH
IOL
TA
Parameter
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Free Air Operating Temperature
Min
Nom
4.75
5
2
0
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
VI
Input Clamp Voltage
VOH
HIGH Level
Output Voltage
VOL
LOW Level
Output Voltage
II
Input Current @ Max Input Voltage
IIH
HIGH Level Input Current
IIL
LOW Level Input Current
IOS
Short Circuit Output Current
ICC
Supply Current
VCC = Min, II = −12 mA
VCC = Min, IOH = Max
VIL = Max, VIH = Min
VCC = Min, IOL = Max
VIH = Min, VIL = Max
VCC = Max, VI = 5.5V
VCC = Max, VI = 2.4V
VCC = Max, VI = 0.4V
VCC = Max (Note 3)
VCC = Max (Note 4)
Note 2: All typicals are at VCC = 5V, TA = 25°C.
Note 3: Not more than one output should be shorted at a time.
Note 4: ICC is measured with all outputs open and all inputs grounded.
Switching Characteristics
at VCC = 5V and TA = 25°C
Symbol
Parameter
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
from A, B, C or D through
2 Levels of Logic
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
from A, B, C or D through
3 Levels of Logic
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
from A, B, C or D through
2 Levels of Logic
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
from A, B, C or D through
3 Levels of Logic
CL = 15 pF
RL = 400
Conditions
Max
Units
5.25
V
V
0.8
V
0.8
mA
16
mA
70
°C
Typ
Min
Max
(Note 2)
1.5
2.4
3.4
Units
V
V
0.2
0.4
V
1
mA
40
µA
1.6
mA
18
55
mA
28
56
mA
Min
Max
Units
25
ns
30
ns
25
ns
30
ns
3
www.fairchildsemi.com

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