CMX624 데이터 시트보기 (PDF) - MX-COM Inc

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CMX624

Bell 202 and V.23 Modem with Call Progress and DTMF

MX-COM Inc  

Bell 202 and V.23 Compatible Modem

12

CMX624 Preliminary Information

4.10 Transmit Filter

This stage attenuates out of band signals present at the output of the FSK/DTMF modulator and also includes

a programmable 3dB level switch, selected by Bit 2 of the FSK MODE Register.

The nominal output levels at the TX pin when VDD = 5.0V are as shown below.

FSK MODE

Register Bit 2

0 (low level)

1 (high level)

0dB = 775mVRMS

FSK Signal

-6dB

-3dB

DTMF Tone

(Low group)

-5dB

-2dB

Table 9: Transmit Filter

DTMF Tone

(High group)

-3dB

0dB

These levels are proportional to VDD, and the actual transmit signal levels present on the 2- or 4-wire line will

depend on the external circuitry as described in Section 5.1. Using the external components recommended in

Section 5.1 for a nominal FSK transmit level of -9dBm, DTMF tone levels of -8dBm and -6dBm, then the out

of band energy sent to the line will be within the limits shown in Figure 9 for both FSK and DTMF signals.

0

-10

Bell 202

-20

-30

dBm

V23

-40

-50

-60

-70

10

100

1000 Hz 10000

100000

Figure 9: Maximum Out of Band Tx Line Energy Limits

4.11 Transmit Output Buffer

This buffer amplifier, connected to the TXIN-, TX+ and TX- pins, is intended for use as a Tx line driver as

shown in

Section 5.1. Two symmetrical outputs are provided for use with a balanced load to give sufficient Tx line

signal levels even at low VDD. If this is not required the TX- output can be disabled.

If the buffer is used as a balanced line driver, then Bit 6 of the SETUP Register should be set to ‘1’ (TX-

output enabled). Setting Bit 6 to ‘0’ disables the TX- output and the buffer draws less current from the supply.

When Bit 6 is set to '0' the TX- pin should be left open circuit. N.B. The TX+ output is unaffected by this Bit.

4.12 Ring Signal Detector

This block, which functions even in Zero Power mode, can be used to detect a telephone line Ring Signal or

Line Voltage Reversal and then generate a Interrupt Request signal to wake up the µC at the start of a call.

Suitable interface circuits are shown in Section 5.2.

The output of this block is the ‘Ring Detect’ line shown in Figure 1, which directly drives Bit 6 of the FLAGS

Register. Any ‘0’ to ‘1’ or ‘1’ to ‘0’ change on this line will also set the Ring Detect Change Bit (5) of the

FLAGS Register.

If this block is not used, then the RD and RT pins should be connected to VSS and the Ring Detect

Change Bit (5) of the IRQ MASK Register set to ‘0’.

©1999 MX-COM, Inc.

www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054

Doc. # 20480180.108

4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA

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