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SST25PF020B

2 Mbit 2.3-3.6V SPI Serial Flash

Microchip Technology 

SST25PF020B

The Write-Status-Register instruction also writes new

values to the Status Register 1. To write values to Sta-

tus Register 1, the WRSR sequence needs a word-

data input—the first byte being the Status Register bits,

followed by the second byte Status Register 1 bits. CE#

must be driven low before the command sequence of

the WRSR instruction is entered and driven high before

the WRSR instruction is executed. See Figure 4-19 for

EWSR or WREN and WRSR instruction word-data

input sequences.

Executing the Write-Status-Register instruction will be

ignored when WP# is low and BPL bit is set to ‘1’. When

the WP# is low, the BPL bit can only be set from ‘0’ to

‘1’ to lock-down the status registers, but cannot be

reset from ‘1’ to ‘0’. When WP# is high, the lock-down

function of the BPL bit is disabled and the BPL, BP0,

BP1, TSP, and BSP bits in the status register can all be

changed. As long as BPL bit is set to 0 or WP# pin is

driven high (VIH) prior to the low-to-high transition of the

CE# pin at the end of the WRSR instruction, the bits in

the status register can all be altered by the WRSR

instruction. In this case, a single WRSR instruction can

set the BPL bit to “1” to lock down the status register as

well as altering the BPL, BP0, BP1, TSP, and BSP bits

at the same time. See Table 4-1 for a summary descrip-

tion of WP# and BPL functions.

CE#

MODE 3

SCK MODE 0

0 1 2345 6 7

SI

50 or 06

MSB

SO

MODE 3 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

MODE 0

01

MSB

HIGH IMPEDANCE

STATUS

REGISTER

STATUS

REGISTER 1

76 54 3 2 10 76 54 3 2 10

MSB

MSB

25135 EWSR1.0

FIGURE 4-19:

ENABLE-WRITE-STATUS-REGISTER (EWSR) OR WRITE-ENABLE (WREN) AND

WRITE-STATUS-REGISTER (WRSR) WORD-DATA INPUT SEQUENCE

The WRSR instruction can either execute a byte-data

or a word-data input. Extra data/clock input, or within

byte-/word-data input, will not be executed. The reason

for the byte support is for backward compatibility to

products where WRSR instruction sequence is fol-

lowed by only a byte-data.

 2013 Microchip Technology Inc.

DS20005135B-page 17

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