SST37VF010 데이터 시트보기 (PDF) - Silicon Storage Technology
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SST37VF010
Silicon Storage Technology
SST37VF010 Datasheet PDF : 16 Pages
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512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST37VF512 / SST37VF010 / SST37VF020 / SST37VF040
Data Sheet
AC CHARACTERISTICS
TABLE 9: READ CYCLE TIMING PARAMETERS VDD = 2.7-3.6V (Ta = 0°C to +70°C (Commercial))
SST37VF512-70
SST37VF010-70
SST37VF020-70
SST37VF040-70
SST37VF512-90
SST37VF010-90
SST37VF020-90
SST37VF040-90
Symbol Parameter
Min
Max
Min
Max
Units
TRC
Read Cycle Time
70
90
TCE
Chip Enable Access Time
70
90
TAA
Address Access Time
70
90
TOE
Output Enable Access Time
35
45
TCLZ1
CE# Low to Active Output
0
0
TOLZ1
OE# Low to Active Output
0
0
TCHZ1
CE# High to High-Z Output
30
30
TOHZ1
OE# High to High-Z Output
30
30
TOH1
Output Hold from Address Change
0
0
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
ns
ns
ns
ns
ns
ns
ns
ns
ns
T9.2 397
TABLE 10: PROGRAM/ERASE CYCLE TIMING PARAMETERS VDD = 2.7-3.6V (Ta = 25°C±5°C)
Symbol Parameter
Min
TBP
Byte-Program Time
12
TCES
CE# Setup Time
1
TCEH
CE# Hold Time
1
TAS
Address Setup Time
1
TAH
Address Hold Time
1
TDS
Data Setup Time
1
TDH
Data Hold Time
1
TPRT
OE# Rise Time for Program and Erase
1
TVPS
OE# Setup Time for Program and Erase
1
TVPH
OE# Hold Time for Program and Erase
1
TPW
WE# Program Pulse Width
10
TEW
WE# Erase Pulse Width
100
TVR
OE#/A9 Recovery Time for Erase
1
TART
A9 Rise Time to 12V during Erase
1
TA9S
A9 Setup Time during Erase
1
TA9H
A9 Hold Time during Erase
1
Max
20
15
500
Units
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ms
T10.0 397
©2001 Silicon Storage Technology, Inc.
7
S71151-02-000 5/01 397
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