SST39LF016-90-4I-EH 데이터 시트보기 (PDF) - Silicon Storage Technology

부품명

상세내역

제조사

SST39LF016-90-4I-EH

8 Mbit / 16 Mbit (x8) Multi-Purpose Flash

Silicon Storage Technology 

8 Mbit / 16 Mbit Multi-Purpose Flash

SST39LF080 / SST39LF016 / SST39VF080 / SST39VF016

Data Sheet

TABLE 9: DC OPERATING CHARACTERISTICS

VDD = 3.0-3.6V FOR SST39LF080/016 AND 2.7-3.6V FOR SST39VF080/016

Limits

Symbol Parameter

Min Max Units Test Conditions

IDD

ISB

IALP

ILI

ILO

VIL

VILC

VIH

VIHC

VOL

VOH

Power Supply Current

Read

Program and Erase

Standby VDD Current

Auto Low Power

Input Leakage Current

Output Leakage Current

Input Low Voltage

Input Low Voltage (CMOS)

Input High Voltage

Input High Voltage (CMOS)

Output Low Voltage

Output High Voltage

15

20

20

20

1

10

0.8

0.3

0.7VDD

VDD-0.3

0.2

VDD-0.2

Address input=VIL/VIH, at f=1/TRC Min

VDD=VDD Max

mA CE#=OE#=VIL, WE#=VIH, all I/Os open

mA CE#=WE#=VIL, OE#=VIH

µA CE#=VIHC, VDD=VDD Max

µA CE#=VILC, VDD=VDD Max

All inputs=VIHC or VILC WE#=VIHC

µA VIN=GND to VDD, VDD=VDD Max

µA VOUT=GND to VDD, VDD=VDD Max

V VDD=VDD Min

V VDD=VDD Max

V VDD=VDD Max

V VDD=VDD Max

V IOL=100 µA, VDD=VDD Min

V IOH=-100 µA, VDD=VDD Min

T9.2 396

TABLE 10: RECOMMENDED SYSTEM POWER-UP TIMINGS

Symbol

Parameter

Minimum

Units

TPU-READ1

Power-up to Read Operation

100

µs

TPU-WRITE1

Power-up to Program/Erase Operation

100

µs

T10.1 396

1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.

TABLE 11: CAPACITANCE (Ta = 25°C, f=1 Mhz, other pins open)

Parameter

Description

Test Condition

Maximum

CI/O1

CIN1

I/O Pin Capacitance

Input Capacitance

VI/O = 0V

VIN = 0V

12 pF

6 pF

T11.0 396

1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.

TABLE 12: RELIABILITY CHARACTERISTICS

Symbol

Parameter

Minimum Specification

Units Test Method

NEND1

Endurance

10,000

Cycles JEDEC Standard A117

TDR1

Data Retention

100

Years JEDEC Standard A103

ILTH1

Latch Up

100 + IDD

mA JEDEC Standard 78

T12.1 396

1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.

©2001 Silicon Storage Technology, Inc.

11

S71146-03-000 6/01 396

Share Link: