ST72C314N4T1(2003) 데이터 시트보기 (PDF) - STMicroelectronics

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ST72C314N4T1
(Rev.:2003)

8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, ADC, 16-BIT TIMERS, SPI, SCI INTERFACES

STMicroelectronics 

ST72334J/N, ST72314J/N, ST72124J

1 PREAMBLE: ST72C334 VERSUS ST72E331 SPECIFICATION

New Features available on the ST72C334

s 8 or 16K FLASH/ROM with In-Situ

Programming and Read-out protection

s New ADC with a better accuracy and conversion

time

s New configurable Clock, Reset and Supply

system

s New power saving mode with real time base:

Active Halt

s Beep capability on PF1

s New interrupt source: Clock security system

(CSS) or Main clock controller (MCC)

New Memory Locations in ST72C334

s 20h: MISCR register becomes MISCR1 register

(naming change)

s 29h: new control/status register for the MCC

module

s 2Bh: new control/status register for the Clock,

Reset and Supply control. This register replaces

the WDGSR register keeping the WDOGF flag

compatibility.

s 40h: new MISCR2 register

ST72C334 I/O Configuration and Pinout

s Same pinout as ST72E331

s PA6 and PA7 are true open drain I/O ports

without pull-up (same as ST72E331)

s PA3, PB3, PB4 and PF2 have no pull-up

configuration (all I/Os present on TQFP44)

s PA5:4, PC3:2, PE7:4 and PF7:6 have high sink

capabilities (20mA on N-buffer, 2mA on P-buffer

and pull-up). On the ST72E331, all these pads

(except PA5:4) were 2mA push-pull pads

without high sink capabilities. PA4 and PA5

were 20mA true open drains.

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