ST1331 데이터 시트보기 (PDF) - STMicroelectronics
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ST1331 Datasheet PDF : 3 Pages
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ST1331, ST1333, ST1353
Figure 2. Memory Map
Circuit
0
16 masked bits
Identification Area
16
48 bits
Card Identification
Area (ID)
64
Data Area (CD)
40 bits
(Counters and
Transport Code)
8 bits
Reserved Area (RA)
104
112
16 bits
Certificate (CER)
128
Issuer-Defined Area
(ST1331)
64 bits
Authentication
Secret Key (SK)
(ST1333, ST1353)
192
32 bits
RAM1 (Write-Only) 0
(RN)
(ST1333, ST1353)
32
Reserved Area
(RA)
4 bits
4 bits
Signature
Fuses
256
260
264
24 bits
Unused
288
32 bits Anti-Tearing Flags
320
56 bits User-Defined Area
376
Note: 1. The write-only RAM area (RN) is applicable only for the User Configuration.
AI03384
a byte-wise fashion for internal erasing. An on-chip
address counter provides an internal address
space of up to 512 bits.
Each member of the ST1331/1333/1353 family
has an identification data area, unit-counters (with
an anti-tearing mechanism for reliable usage in
open readers), a post validation certificate, an
issuer area (ST1331) or an authentication secret
key area (ST1333/1353), and a user area. This is
summarized in Figure 2.
The validation certificate allows the recognition of
the device by the appropriate security module.
The anti-tearing mechanism guards against extra,
spurious count signals being executed when the
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