ST70135 데이터 시트보기 (PDF) - STMicroelectronics

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ST70135

ASCOT™ DMT TRANSCEIVER

STMicroelectronics 

ST70135A

Figure 1 : Block Diagram

TEST SIGNALS

CLOCK

AFE

INTERFACE

AFE

CONTROL

TEST MODULE

DATA SYMBOL TIMING UNIT

VCXO

DSP

FRONT-END

FFT/IFFT

ROTOR

TRELLIS

CODING

MAPPER/

DEMAPPER

GENERIC

TC

REED/

SOLOMON

INTERFACE

MODULE

AFE CONTROL

INTERFACE

CONTROLLER

INTERFACE

ATM

SPECIFIC TC

STM

UTOPIA

CONTROLLER

GENERAL

BUS

PURPOSE I/Os

TRANSIENT ENERGY CAPABILITIES

ESD

ESD (Electronic Discharged) tests have been

performed for the Human Body Model (HBM) and

for the Charged Device Model (CDM). The pins of

ABSOLUTE MAXIMUM RATINGS

the device are to be able to withstand minimum

2000V for the HBM and minimum 250V for CDM.

Latch-up

The maximum sink or source current from any pin

is limited to 200mA to prevent latch-up.

Symbol

VDD

Ptot

Tamb

Parameter

Supply Voltage

Total Power Dissipation

Ambient Temperature 1m/s airflow

Minimum Typical Maximum Unit

3.0

3.3

3.6

V

900

1400

mW

0

70

°C

2/29

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