ST70135 데이터 시트보기 (PDF) - STMicroelectronics

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ST70135

ASCOT™ DMT TRANSCEIVER

STMicroelectronics 

ST70135A

I/O DRIVER FUNCTION

Driver

BD4CR

BD8SCR

IBUF

IBUFDQ

IBUFUQ

PIN SUMMARY

Function

CMOS bidirectional, 4mA, slew rate control

CMOS bidirectional, 8mA, slew rate control, Schmitt trigger

CMOS input

CMOS input, pull down, IDDq control

CMOS input, pull up, IDDq control

Mnemonic

Type BS Type Signals

Function

Power Supply

VDD

VSS

ATC INTERFACE

ALE

PCLK

CSB

BE1

WR_RDB

RDYB

INTB

I

C

I

I

I

I

I

I

I

I

OZ

O

O

O

(VSS + 3.3V) Power Supply

0V Ground

1 Used to latch the address of the internal register to be

accessed

1 Processor clock

1 Chip selected to respond to bus cycle

1 Address 1 (not multiplexed)

1 Specifies the direction of the access cycle

1 Controls the ATC bus cycle termination

1 Requests ATC interrupt service

AD

IO

B

OBC_TYPE

I-PD

I

TEST ACCESS PART INTERFACE

TDI

I-PU

TDO

OZ

TCK

I-PD

TMS

I-PU

TRSTB

I-PD

ANALOG FRONT END INTERFACE

AFRXD

I

I

AFTXD

O

O

AFTXED

O

O

CLWD

I

I

PDOWN

O

O

CTRLDATA

O

O

MCLK

I

C

16 Multiplexed Address/Data bus

1 Select between i960 (0) or generic (1) controller interface

1 Refer to section

1

1

1

1

4 Receive data nibble

4 Transmit data nibble

4 Transmit echo nibble

1 Start of word indication

1 Power down analog front end

1 Serial data transmit channel

1 Master cloc

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