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ST777ACD 데이터 시트보기 (PDF) - STMicroelectronics

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ST777ACD Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
ST777/778/779
TYPICAL APPLICATION CIRCUIT
Vin
1÷6V
C1
22µF
1 ILIM
SEL / N.C. / FB 8
R2
ST777 ____
2 V+
ST778 SHDN 7
R1
C3
L1
ST779
22µH
3 AGND
Vout 6
Vo
4 PGND
LX 5
C2
100µF
APPLICATIONS INFORMATION
R1 and R2 must be placed only in ST779
applications to set the output voltage according to
the following equation:
VOUT = (1.23) [(R1+R2)/R2]
and to simplify the resistor selection:
R1 = R2 [(VOUT/1.23)-1]
It is possible to use a wide range of values for R2
(10Kto 50K) with no significant loss of
accuracy thanks to the very low FB input current.
To have 1% error, the current through R2 must be
at least 100 times FB’s bias current.
When large values are used for the feedback
resistors (R1>50K), stray output impedance at
FB can incidentally add "lag" to the feedback
response, destabilizing the regulator and creating
a larger ripple at the output. Lead lengths and
circuit board traces at the FB node should be kept
short. Compensate the loop by adding a "lead"
compensation capacitor (C3, 100pF to 1nF) in
parallel with R1.
The typical value of the L1 inductor is 22µH,
enough for most applications. However, are also
suitable values ranging from 10µF to 47µF with a
saturation rating equal to or greater than the peak
switch -current limit.
Efficiency will be reduced if the inductor works
near its saturation limit, while will be maximized
using an inductor with a low DC resistance,
preferably under 0.2Ω.
Connecting ILIM to VIN the maximum LX current
limit (1A) is set. If this maximum value is not
required is possible to reduce it connecting a
resistor between ILIM and VIN (See Figure 16 to
choose the right value). The current limit value is
misured when the switch current through the
inductor begins to flatten and does’nt coincide with
the max short circuit current.
Even if the device is designed to tolerate a short
circuit without any damage, it is strictly
recommended to avoid a continuos and durable
short circuit of the output to GND.
To achieve the best performances from switching
power supply topology, particular care to layout
drawing is needed, in order to minimize EMI and
obtain low noise. Moreover, jitter free operation
ensures the full device functionality. Wire lengths
must be minimized, filter and by-pass capacitors
must be low ESR type, placed as close as
possible to the integrated circuit. Solder AGND
and PGND pins directly to a ground plane.
4/11

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