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STK10C48 데이터 시트보기 (PDF) - Unspecified

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STK10C48 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
STK10C48
RECALL CYCLES #1, #2 & #3
(VCC = 5.0V ± 10%)b
SYMBOLS
NO.
#1
#2
#3
PARAMETER
MIN
MAX
UNITS
29
tNLQXp
30
tNLNHq
tELQX
tELNH
tGLQX
tGLNH
RECALL Cycle Time
RECALL Initiation Cycle Time
20
µs
20
ns
31
tNLEL
tNLGL
NE Set-up
5
ns
32
tGLNL
tGLEL
Output Enable Set-up
5
ns
33
tWHNL
tWHEL
tWHGL
Write Enable Set-up
5
ns
34
tELNL
tGLEL
tELGL
Chip Enable Set-up
5
ns
35
tNLQZ
NE Fall to Outputs Inactive
20
ns
36
tRESTORE
Power-up RECALL Duration
550
µs
Note p:
Note q:
Note r:
Measured with W and NE both high, and G and E low.
Once tNLNH has been satisfied by NE, G, W and E, the RECALL cycle is completed automatically. Any of NE, G or E may be used to terminate
the RECALL initiation cycle.
If W is low at any point in which both E and NE are low and G is high, then a STORE cycle will be initiated instead of a RECALL.
RECALL CYCLE #1: NE Controlledo
NE
32
tGLNL
G
30
tNLNH
W
E
DQ (DATA OUT)
33
tWHNL
34
tELNL
35
tNLQZ
29
tNLQX
HIGH IMPEDANCE
RECALL CYCLE #2: E Controlledo
31
tNLEL
NE
32
tGLEL
G
W
E
DQ (DATA OUT)
33
tWHEL
HIGH IMPEDANCE
30
tELNH
29
tELQX
RECALL CYCLE #3: G Controlledo, r
31
tNLGL
NE
G
33
tWHGL
W
34
tELGL
E
DQ (DATA OUT)
HIGH IMPEDANCE
30
tGLNH
29
tGLQX
July 1999
3-6

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