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STK14CA8 데이터 시트보기 (PDF) - Cypress Semiconductor
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STK14CA8
128Kx8 AutoStore™ nvSRAM
Cypress Semiconductor
STK14CA8 Datasheet PDF : 16 Pages
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STK14CA8
Mode Selection
E
W
G
H
X
X
L
H
L
L
L
X
L
H
L
L
H
L
L
H
L
L
H
L
A
16
-A
0
X
X
X
0x04E38
0x0B1C7
0x083E0
0x07C1F
0x0703F
0x08B45
0x04E38
0x0B1C7
0x083E0
0x07C1F
0x0703F
0x04B46
0x04E38
0x0B1C7
0x083E0
0x07C1F
0x0703F
0x08FC0
0x04E38
0x0B1C7
0x083E0
0x07C1F
0x0703F
0x04C63
Mode
Not Selected
Read SRAM
Write SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
AutoStore Disable
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
AutoStore Enable
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile Store
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile Recall
I/O
Output High Z
Output Data
Input Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Power
Standby
Active
Active
Active
Active
Active
I
CC2
Active
Notes
17, 18, 19
17, 18, 19
17, 18, 19
17, 18, 19
Notes
17. The six consecutive addresses must be in the order listed. W must be high during all six consecutive cycles to enable a nonvolatile cycle.
18. While there are 17 addresses on the STK14CA8, only the lower 16 are used to control software modes
19. I/O state depends on the state of G. The I/O table shown assumes G low
Document Number: 001-51592 Rev. **
Page 10 of 16
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