STK20C04-W35 데이터 시트보기 (PDF) - Unspecified
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STK20C04-W35 Datasheet PDF : 8 Pages
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DEVICE OPERATION
STK20C04
The STK20C04 has two modes of operation: SRAM
mode and nonvolatile mode, determined by the state of
the NE pin. When in SRAM mode, the memory operates
as an ordinary static RAM. While in nonvolatile mode,
data is transferred in parallel from SRAM to EEPROM or
from EEPROM to SRAM.
and output is disabled and the DQ0-7 pins are tri-stated
until the cycle is completed.
If E and G are LOW and W and NE are HIGH at the end
of the cycle, a READ will be performed and the outputs
will go active, signaling the end of the STORE.
SRAM READ
The STK20C04 performs a READ cycle whenever E
and G are LOW and NE and W are HIGH. The address
specified on pins A0-8 determines which of the 512
data bytes will be accessed. When the READ is initiated
by an address transition, the outputs will be valid after
a delay of tAVQV (READ CYCLE #1). If the READ is
initiated by E or G, the outputs will be valid at tELQV or
at tGLQV whichever is later (READ CYCLE #2). The data
outputs will repeatedly respond to address changes
within the tAVQV access time without the need for
transitions on any control input pins, and will remain
valid until another address change or until E or G is
brought HIGH or W or NE is brought LOW.
SRAM WRITE
A write cycle is performed whenever E and W are LOW
and NE is HIGH. The address inputs must be stable
prior to entering the WRITE cycle and must remain
stable until either E or W go HIGH at the end of the
cycle. The data on pins DQ0-7 will be written into the
memory if it is valid tDVWH before the end of a W
controlled WRITE or tDVEH before the end of an E
controlled WRITE.
It is recommended that G be kept HIGH during the entire
WRITE cycle to avoid data bus contention on common
I/O lines. If G is left LOW, internal circuitry will turn off
the output buffers tWLQZ after W goes LOW.
NONVOLATILE STORE
A STORE cycle is performed when NE, E and W are
LOW and G is HIGH. While any sequence to achieve
this state will initiate a STORE, only W initiation (STORE
CYCLE #1) and E initiation (STORE CYCLE #2) are
practical without risking an unintentional SRAM WRITE
that would disturb SRAM data. During a STORE cycle,
previous nonvolatile data is erased and the SRAM
contents are then programmed into nonvolatile ele-
ments. Once a STORE cycle is initiated, further input
HARDWARE PROTECT
The STK20C04 offers two levels of protection to sup-
press inadvertent STORE cycles. If the control signals
(E, G, W, and NE) remain in the STORE condition at the
end of a STORE cycle, a second STORE cycle will not
be started. The STORE (or RECALL) will be initiated
only after a transition on any one of these signals to the
required state. In addition to multi-trigger protection,
the STK20C04 offers hardware protection through VCC
Sense. A STORE cycle will not be initiated, and one in
progress will discontinue if VCC goes below 3.8V. 3.8V
is a typical, characterized value.
NONVOLATILE RECALL
A RECALL cycle is performed when E, G, and NE are
LOW and W is HIGH. Like the STORE cycle, RECALL is
initiated when the last of the four clock signals goes to
the RECALL state. Once initiated, the RECALL cycle will
take tNLQX to complete, during which all inputs are
ignored. When the RECALL completes, any READ or
WRITE state on the input pins will take effect.
Internally, RECALL is a two step procedure. First, the
SRAM data is cleared and second, the nonvolatile
information is transferred into the SRAM cells. The
RECALL operation in no way alters the data in the
nonvolatile cells. The nonvolatile data can be recalled
an unlimited number of times.
Like the STORE cycle, a transition must occur on any
control pin to cause a recall, preventing inadvertent
multi-triggering. On power-up, once VCC exceeds the
VCC sense voltage of 3.8V, a RECALL cycle is automati-
cally initiated. The voltage on the VCC pin must not drop
below 3.8V once it has risen above it in order for the
RECALL to operate properly. Due to this automatic
RECALL, SRAM operation cannot commence until tNLQX
after VCC exceeds 3.8V. 3.8V is a typical, character-
ized value.
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